TS-4700 Clocks: Difference between revisions
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The last 3 clocks cannot all be enabled at the same time, but the CN2_54 clock is always enabled. If you require a different clock you can [[#FPGA Programming|build a new bitstream]] excluding or adding clocks, or [http://www. | The last 3 clocks cannot all be enabled at the same time, but the CN2_54 clock is always enabled. If you require a different clock you can [[#FPGA Programming|build a new bitstream]] excluding or adding clocks, or [http://www.embeddedTS.com/support/contact-us.php contact us] for our engineering services. | ||
Latest revision as of 16:48, 17 January 2022
The FPGA includes 1 permanent clock, and 3 selectable clocks.
| Pin | Clock | Enable |
|---|---|---|
| mfp_51_pad (CN2_54) | 12.5MHz | Always On |
| DIO 3 (CN1_87) | 12.5MHz | Toggled in the #Syscon |
| DIO 34 (CN1_64) | 25MHz | Toggled in the #Syscon |
| DIO 3 (CN1_87) | 14.3MHz | Toggled in the #Syscon |
The last 3 clocks cannot all be enabled at the same time, but the CN2_54 clock is always enabled. If you require a different clock you can build a new bitstream excluding or adding clocks, or contact us for our engineering services.