4300 TS-Socket

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CN1 CN2
Name Pin Pin Name
FPGA_JTAG_TMS [1] 1 2 #EXT_RESET [2]
FPGA_JTAG_TCK [1] 3 C 4 EN_USB_5V [3]
FPGA_JTAG_TDO [1] 5 N 6 DIO_62
FPGA_JTAG_TDI [1] 7 1 8 DIO_61
OFF_BD_RESET# [4] 9 10 DIO_60
DIO_17 11 12 DIO_59
DIO_18 13 C 14 DIO_58
POWER [5] 15 N 16 POWER [5]
DIO_37 17 1 18 DIO_57
DIO_36 19 20 DIO_56
DIO_35 21 22 DIO_55
DIO_34 23 C 24 DIO_54
DIO_33 25 N 26 DIO_53
DIO_32 27 1 28 DIO_52
POWER [5] 29 30 DIO_51
DIO_31 31 32 DIO_50
DIO_30 33 C 34 DIO_49
DIO_29 35 N 36 V_BAT [6]
DIO_28 37 1 38 DIO_48
DIO_27 39 40 DIO_47
DIO_26 41 42 DIO_46
DIO_25 43 C 44 DIO_45
DIO_24 45 N 46 DIO_44
POWER [5] 47 1 48 EN_LCD_3.3V [7]
DIO_23 49 50 DIO_43
DIO_22 51 52 DIO_42
DIO_21 53 C 54 DIO_41
DIO_20 55 N 56 FLASH_DOUT [8]
DIO_19 57 1 58 FLASH_DIN [8]
FLASH_CS# [8] 59 60 FLASH_CLK [8]
FPGA_FLASH_CS# [8] 61 62 Ground
DIO_14 63 C 64 DIO_89 / AD_15
DIO_13 65 N 66 DIO_88 / AD_14
DIO_12 67 1 68 DIO_87 / AD_13
DIO_11 69 70 DIO_86 / AD_12
DIO_10 71 72 DIO_85 / AD_11
DIO_09 73 C 74 DIO_84 / AD_10
Ground 75 N 76 DIO_83 / AD_09
DIO_08 77 1 78 DIO_82 / AD_08
DIO_07 79 80 DIO_81 / AD_07
DIO_06 81 82 DIO_80 / AD_06
DIO_05 83 C 84 DIO_79 / AD_05
DIO_04 85 N 86 DIO_78 / AD_04
DIO_03 87 1 88 DIO_77 / AD_03
DIO_02 89 90 DIO_76 / AD_02
DIO_01 91 92 DIO_75 / AD_01
DIO_00 93 C 94 DIO_74 / AD_00
Ground 95 N 96 DIO_94 / BUS_ALE#
DIO_90 / BUS_WAIT# 97 1 98 DIO_93 / BUS_DIR
DIO_91 / BUS_BHE# 99 100 DIO_92 / BUS_CS#
Name Pin Pin Name
ETH_RX+ 1 2 ETH_LEFT_LED
ETH_RX- 3 C 4 ETH_RIGHT_LED
ETH_CT 5 N 6 RED_LED#
ETH_TX+ 7 2 8 GREEN_LED#
ETH_TX- 9 10 GPIO_A31
ETH_CT 11 12 GPIO_B0
3.3V [9] 13 C 14 Reserved
Ground 15 N 16 Reserved
Reserved 17 2 18 Reserved
Reserved 19 20 Reserved
Ground 21 22 Reserved
Reserved 23 C 24 Reserved
Reserved 25 N 26 Reserved
Ground 27 2 28 TWI_CLK
HOST_USB_M 29 30 TWI_DAT
HOST_USB_P 31 32 GPIO_B17
CPU_CORE 33 C 34 AUD_MCLK
USB_OTG_M 35 N 36 GPIO_B22
USB_OTG_P 37 2 38 GPIO_B23
3.3V [9] 39 40 GPIO_B24
Reserved 41 42 GPIO_B25
Reserved 43 C 44 CPU_JTAG_TMS
Ground 45 N 46 CPU_JTAG_TCK
CPU_PCIE_TX1_M 47 2 48 CPU_JTAG_TDI
CPU_PCIE_TX1_P 49 50 CPU_JTAG_TDO
Ground 51 52 DIO_73
CPU_PCIE_RX1_M 53 C 54 DIO_72
CPU_PCIE_RX1_P 55 N 56 DIO_71
DDR 1.8V [10] 57 2 58 DIO_70
PCIE_CLK3_M 59 60 DIO_69
PCIE_CLK3_P 61 62 DIO_68
2.5V [11] 63 C 64 DIO_67
SPI_CS 65 N 66 DIO_66
SPI_MOSI 67 2 68 DIO_65
SPI_MISO 69 70 DIO_64
SPI_CLK 71 72 DIO_63
Ground 73 C 74 USB_OTG_ID
Reserved 75 N 76 USB_OTG_5V
Reserved 77 2 78 DIO_96 / XUART0_TXD
3.3V [9] 79 80 DIO_97 / UART0_RXD
Reserved 81 82 DIO_98 / UART1_TXD
Reserved 83 C 84 DIO_99 / UART1_RXD
Reserved 85 N 86 DIO_100 / UART2_TXD
Reserved 87 2 88 DIO_101 / UART2_RXD
Reserved 89 90 DIO_102 / UART3_TXD
Reserved 91 92 DIO_103 / UART3_RXD
DEBUG_TXD 93 C 94 DIO_104 / UART4_TXD
DEBUG_RXD 95 N 96 DIO_105 / UART4_RXD
DIO_15 / CAN_TXD 97 2 98 DIO_106 / UART5_TXD
DIO_16 / CAN_RXD 99 100 DIO_107 / UART5_RXD
  1. ↑ 1.0 1.1 1.2 1.3 The FPGA JTAG pins are not recommended for use and are not supported. See the #FPGA Programming section for the recommended method to reprogram the FPGA.
  2. ↑ EXT_RESET# is an input used to reboot the CPU. Do not drive active high, use open drain.
  3. ↑ On our baseboard designs this pin is typically used to toggle power to the USB 5V rail.
  4. ↑ The off board reset is driven low to reset all peripherals.
  5. ↑ 5.0 5.1 5.2 5.3 Power pins all supply power to the module. Apply 4.0V to 5.5V to these pins.
  6. ↑ Optionally you can connect a 3.3V battery to this pin to keep the RTC alive between reboots and while the 5V rail is down.
  7. ↑ On our off the shelf baseboards this is used to toggle the 3.3V power supply for an LCD interface such as on the TS-8390.
  8. ↑ 8.0 8.1 8.2 8.3 8.4 These are SPI flash pins. Custom baseboard designs can contain their own supported SPI flash chip which can be used to boot, or access with spiflashctl.
  9. ↑ 9.0 9.1 9.2 The System-on-Module regulates a 3.3V rail which can source up to 700mA by the baseboard. Note that each pin on the socket connector is only rated to 500mA so other 3.3V lines must also be used to get the full 700mA.
  10. ↑ Maximum off-board load on DDR_1.8V is 100mA
  11. ↑ Maximum off-board load on 2.5V is 10mA
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