TS-4900 CPU SPI Controller: Difference between revisions

From embeddedTS Manuals
No edit summary
No edit summary
Line 1: Line 1:
The CPU has 2 SPI controllers which are accessible through either specific kernel drivers, or userspace using the /dev/spi interface.  To utilize SPI, most projects will end up with a customized device tree, so setting up the kernel build environment will be necessary.  See the [[#Compile_the_Kernel|kernel compile guide here]] for more details.
The CPU has 2 SPI controllers which are accessible through either specific kernel drivers, or userspace using the /dev/spi interface.  To utilize SPI, most projects will end up with a customized device tree, so setting up the kernel build environment will be necessary.  See the [[#Compile_the_Kernel|kernel compile guide here]] for more details.


Open the baseboard dts from arch/arm/boot/dts/imx6qdl-ts4900-<baseboardid>.dtsi, or the generic imx6qdl-ts4900.dtsi.  The kernel requires a spidev device be added to the relevant ECSPI controller.  For example:
Open the device tree source file such as arch/arm/boot/dts/imx6qdl-ts4900-reve.dtsi or arch/arm/boot/dts/imx6qdl-ts4900.dtsi, or [[#Device_Tree_Order|find the device tree that matches your baseboard]].  The kernel requires a spidev device be added to the relevant ECSPI controller.  For example:
<source lang=javascript>
<source lang=javascript>
&ecspi2 {
&ecspi2 {
Line 29: Line 29:
</source>
</source>


In this case ecspi2 is configured with a spidev at 25MHz which will be available at /dev/spidev1.1 (<bus counting from 0>.<chipselect>).  This example adds the spidev device for the offboard chip select.  You can add any CPU GPIO as chip selects, but they should have a pullup added so they are not asserted by default.  See the "pinctrl_ecspi2" definition which sets up the other pins as 0x100b1.  The line "reg = <1>;" must be declared to select which chip select in the "cs-gpios" array will be asserted when communicating to your device.  After this is configured rebuild the kernel and install your new device tree.   
In this case ecspi2 is configured with a spidev at 25MHz which will be available at /dev/spidev1.1 (<bus counting from 0>.<chipselect>).  This example adds the spidev device for the offboard chip select.  The above example uses GPIO 5 29 which is SPI_2_CS#/CN2_65.  The line "reg = <1>;" must be declared to select which chip select in the "cs-gpios" array will be asserted when communicating to your device.  After this is configured rebuild the kernel and install your new device tree.   


Once you have a /dev/spidev device, you can open this file and use the standard Linux SPI API.  For more information see the documentation and sample code:
Once you have a /dev/spidev device, you can open this file and use the standard Linux SPI API.  For more information see the documentation and sample code:
* [https://github.com/embeddedarm/linux-3.10.17-imx6/blob/imx_4.1.15_1.0.0_ga/Documentation/spi/spidev Linux kernel spidev documentation]
* [https://github.com/embeddedarm/linux-3.10.17-imx6/blob/imx_4.1.15_1.0.0_ga/Documentation/spi/spidev Linux kernel spidev documentation]
* [https://github.com/embeddedarm/linux-3.10.17-imx6/blob/imx_4.1.15_1.0.0_ga/Documentation/spi/spidev_test.c spidev example code]
* [https://github.com/embeddedarm/linux-3.10.17-imx6/blob/imx_4.1.15_1.0.0_ga/Documentation/spi/spidev_test.c spidev example code]

Revision as of 10:31, 9 April 2021

The CPU has 2 SPI controllers which are accessible through either specific kernel drivers, or userspace using the /dev/spi interface. To utilize SPI, most projects will end up with a customized device tree, so setting up the kernel build environment will be necessary. See the kernel compile guide here for more details.

Open the device tree source file such as arch/arm/boot/dts/imx6qdl-ts4900-reve.dtsi or arch/arm/boot/dts/imx6qdl-ts4900.dtsi, or find the device tree that matches your baseboard. The kernel requires a spidev device be added to the relevant ECSPI controller. For example: 

&ecspi2 {
	fsl,spi-num-chipselects = <2>;
	cs-gpios = <&gpio6 2 0>, <&gpio5 29 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";

	serial1: max3100-1@0 {
		compatible = "max3100-ts";
		reg = <0>;
		interrupt-parent = <&gpio1>;
		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
		spi-max-frequency = <10000000>;
		loopback = <0>;
		crystal = <1>;
		poll-time = <100>;
	};

	spidev: spi@1 {
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <25000000>;
	};
};

In this case ecspi2 is configured with a spidev at 25MHz which will be available at /dev/spidev1.1 (<bus counting from 0>.<chipselect>). This example adds the spidev device for the offboard chip select. The above example uses GPIO 5 29 which is SPI_2_CS#/CN2_65. The line "reg = <1>;" must be declared to select which chip select in the "cs-gpios" array will be asserted when communicating to your device. After this is configured rebuild the kernel and install your new device tree.

Once you have a /dev/spidev device, you can open this file and use the standard Linux SPI API. For more information see the documentation and sample code:

Retrieved from "http://docs.embeddedTS.com/index.php?title=TS-4900_CPU_SPI_Controller&oldid=13766"