4700 TS-Socket

Please refer to your baseboard wiki, or schematics for more details on which of these pins go where.

CN1

CN2

Name Pin Pin Name FPGA_JTAG_TMS 1 2 EXT_RESET# FPGA_JTAG_TCK 3 C 4 EN_USB_5V FPGA_JTAG_TDO 5 N 6 SDCARD_D2 FPGA_JTAG_TDI 7 1 8 SDCARD_D3 OFF_BD_RESET# 9 10 SDCARD_CMD Reserved 11 12 SDCARD_3.3V Reserved 13 C 14 SDCARD_CLK POWER 15 N 16 POWER Reserved 17 1 18 SDCARD_D0 LCD_D08 19 20 SDCARD_D1 LCD_D09 21 22 Reserved LCD_D10 23 C 24 LCD_D0 LCD_D11 25 N 26 LCD_D1 LCD_D12 27 1 28 LCD_D2 POWER 29 30 LCD_D3 LCD_D13 31 32 LCD_D4 LCD_D14 33 C 34 LCD_D5 LCD_D15 35 N 36 V_BAT LCD_D16 37 1 38 LCD_D6 LCD_D17 39 40 LCD_D7 LCD_D18 41 42 LCD_D21 LCD_D19 43 C 44 LCD_D22 LCD_D20 45 N 46 LCD_D23 POWER 47 1 48 EN_LCD_3.3V LCD_CLK 49 50 Reserved LCD_HSYNC 51 52 Reserved LCD_VSYNC 53 C 54 Reserved LCD_DE 55 N 56 Reserved LCD_PWM 57 1 58 Reserved Reserved 59 60 Reserved Reserved 61 62 GND DIO_14 63 C 64 MUX_AD_15 DIO_13 65 N 66 MUX_AD_14 DIO_12 67 1 68 MUX_AD_13 DIO_11 69 70 MUX_AD_12 DIO_10 71 72 MUX_AD_11 DIO_9 73 C 74 MUX_AD_10 GND 75 N 76 MUX_AD_9 DIO_8 77 1 78 MUX_AD_8 DIO_7 79 80 MUX_AD_7 DIO_6 81 82 MUX_AD_6 DIO_5 83 C 84 MUX_AD_5 DIO_4 85 N 86 MUX_AD_4 DIO_3 87 1 88 MUX_AD_3 DIO_2 89 90 MUX_AD_2 DIO_1 91 92 MUX_AD_1 DIO_0 93 C 94 MUX_AD_0 GND 95 N 96 BUS_ALE# BUS_WAIT# 97 1 98 BUS_DIR BUS_BHE# 99 100 BUS_CS#

Name Pin Pin Name ETH_RX+ 1 2 ETH_LEFT_LED ETH_RX- 3 C 4 ETH_RIGHT_LED ETH_CT 5 N 6 RED_LED# ETH_TX+ 7 2 8 GREEN_LED# ETH_TX- 9 10 MFP_105 ETH_CT 11 12 MFP_106 3.3V 13 C 14 MFP_122 GND 15 N 16 Reserved Reserved 17 2 18 Reserved Reserved 19 20 Reserved GND 21 22 Reserved Reserved 23 C 24 Reserved Reserved 25 N 26 MFP_49 Reserved 27 2 28 TWI_CLK HOST_USB_M 29 30 TWI_DAT HOST_USB_P 31 32 MFP_104 CPU_CORE 33 C 34 AUD_MCLK USB_OTG_M 35 N 36 AUD_CLK USB_OTG_P 37 2 38 AUD_FRM 3.3V 39 40 AUD_TXD Reserved 41 42 AUD_RXD Reserved 43 C 44 CPU_JTAG_TMS GND 45 N 46 CPU_JTAG_TCK Reserved 47 2 48 CPU_JTAG_TDI Reserved 49 50 CPU_JTAG_TDO GND 51 52 ONE_WIRE/MFP_84 Reserved 53 C 54 MFP_51 Reserved 55 N 56 CAM_MCLK DDR_1.8V 57 2 58 CAM_D0 Reserved 59 60 CAM_D1 Reserved 61 62 CAM_D2 AVDD_OSC 63 C 64 CAM_D5 SPI_FRM 65 N 66 CAM_D6 SPI_MOSI 67 2 68 CAM_D7 SPI_MISO 69 70 CAM_HSYNC SPI_CLK 71 72 CAM_VSYNC GND 73 C 74 USB_OTG_ID Reserved 75 N 76 USB_5V_LINE Reserved 77 2 78 UART0_TXD CPU_JTAG_VCC 79 80 UART0_RXD CAM_D3 81 82 UART1_TXD CAM_D4 83 C 84 UART1_RXD CAM_PCLK 85 N 86 UART2_TXD CAM_VCLK 87 2 88 UART2_RXD MFP_52 89 90 UART3_TXD MFP_43 91 92 UART3_RXD DEBUG_TXD 93 C 94 UART4_TXD DEBUG_RXD 95 N 96 UART4_RXD DIO_15/CAN_TXD 97 2 98 UART5_TXD DIO_16/CAN_RXD 99 100 UART5_RXD