4300 TS-Socket: Difference between revisions
From embeddedTS Manuals
(Created page with "{| ! CN1 ! CN2 |- | {| class=wikitable ! Name ! Pin ! ! Pin ! Name |- | FPGA_JTAG_TMS <ref name=FPGAJTAG>The FPGA JTAG pins are not recommended for use and are not supported....") |
(Change from Macrocontroller to SoM) |
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Line 201: | Line 201: | ||
! C | ! C | ||
| 64 | | 64 | ||
| [[#DIO| | | [[#DIO|DIO_89]] / [[#MUXBUS|AD_15]] | ||
|- | |- | ||
| [[#DIO|DIO_13]] | | [[#DIO|DIO_13]] | ||
Line 207: | Line 207: | ||
! N | ! N | ||
| 66 | | 66 | ||
| [[#DIO| | | [[#DIO|DIO_88]] / [[#MUXBUS|AD_14]] | ||
|- | |- | ||
| [[#DIO|DIO_12]] | | [[#DIO|DIO_12]] | ||
Line 213: | Line 213: | ||
! 1 | ! 1 | ||
| 68 | | 68 | ||
| [[#DIO| | | [[#DIO|DIO_87]] / [[#MUXBUS|AD_13]] | ||
|- | |- | ||
| [[#DIO|DIO_11]] | | [[#DIO|DIO_11]] | ||
Line 219: | Line 219: | ||
! | ! | ||
| 70 | | 70 | ||
| [[#DIO| | | [[#DIO|DIO_86]] / [[#MUXBUS|AD_12]] | ||
|- | |- | ||
| [[#DIO|DIO_10]] | | [[#DIO|DIO_10]] | ||
Line 225: | Line 225: | ||
! | ! | ||
| 72 | | 72 | ||
| [[#DIO| | | [[#DIO|DIO_85]] / [[#MUXBUS|AD_11]] | ||
|- | |- | ||
| [[#DIO|DIO_09]] | | [[#DIO|DIO_09]] | ||
Line 231: | Line 231: | ||
! C | ! C | ||
| 74 | | 74 | ||
| [[#DIO| | | [[#DIO|DIO_84]] / [[#MUXBUS|AD_10]] | ||
|- | |- | ||
| Ground | | Ground | ||
Line 237: | Line 237: | ||
! N | ! N | ||
| 76 | | 76 | ||
| [[#DIO| | | [[#DIO|DIO_83]] / [[#MUXBUS|AD_09]] | ||
|- | |- | ||
| [[#DIO|DIO_08]] | | [[#DIO|DIO_08]] | ||
Line 243: | Line 243: | ||
! 1 | ! 1 | ||
| 78 | | 78 | ||
| [[#DIO| | | [[#DIO|DIO_82]] / [[#MUXBUS|AD_08]] | ||
|- | |- | ||
| [[#DIO|DIO_07]] | | [[#DIO|DIO_07]] | ||
Line 249: | Line 249: | ||
! | ! | ||
| 80 | | 80 | ||
| | | [[#DIO|DIO_81]] / [[#MUXBUS|AD_07]] | ||
|- | |- | ||
| [[#DIO|DIO_06]] | | [[#DIO|DIO_06]] | ||
Line 255: | Line 255: | ||
! | ! | ||
| 82 | | 82 | ||
| | | [[#DIO|DIO_80]] / [[#MUXBUS|AD_06]] | ||
|- | |- | ||
| [[#DIO|DIO_05]] | | [[#DIO|DIO_05]] | ||
Line 261: | Line 261: | ||
! C | ! C | ||
| 84 | | 84 | ||
| | | [[#DIO|DIO_79]] / [[#MUXBUS|AD_05]] | ||
|- | |- | ||
| [[#DIO|DIO_04]] | | [[#DIO|DIO_04]] | ||
Line 267: | Line 267: | ||
! N | ! N | ||
| 86 | | 86 | ||
| | | [[#DIO|DIO_78]] / [[#MUXBUS|AD_04]] | ||
|- | |- | ||
| [[#DIO|DIO_03]] | | [[#DIO|DIO_03]] | ||
Line 273: | Line 273: | ||
! 1 | ! 1 | ||
| 88 | | 88 | ||
| | | [[#DIO|DIO_77]] / [[#MUXBUS|AD_03]] | ||
|- | |- | ||
| [[#DIO|DIO_02]] | | [[#DIO|DIO_02]] | ||
Line 279: | Line 279: | ||
! | ! | ||
| 90 | | 90 | ||
| | | [[#DIO|DIO_76]] / [[#MUXBUS|AD_02]] | ||
|- | |- | ||
| [[#DIO|DIO_01]] | | [[#DIO|DIO_01]] | ||
Line 285: | Line 285: | ||
! | ! | ||
| 92 | | 92 | ||
| | | [[#DIO|DIO_75]] / [[#MUXBUS|AD_01]] | ||
|- | |- | ||
| [[#DIO|DIO_00]] | | [[#DIO|DIO_00]] | ||
Line 291: | Line 291: | ||
! C | ! C | ||
| 94 | | 94 | ||
| | | [[#DIO|DIO_74]] / [[#MUXBUS|AD_00]] | ||
|- | |- | ||
| Ground | | Ground | ||
Line 297: | Line 297: | ||
! N | ! N | ||
| 96 | | 96 | ||
| [[#DIO| | | [[#DIO|DIO_94]] / [[#MUXBUS|BUS_ALE#]] | ||
|- | |- | ||
| | | [[#DIO|DIO_90]] / [[#MUXBUS|BUS_WAIT#]] | ||
| 97 | | 97 | ||
! 1 | ! 1 | ||
| 98 | | 98 | ||
| [[#DIO| | | [[#DIO|DIO_93]] / [[#MUXBUS|BUS_DIR]] | ||
|- | |- | ||
| [[#DIO| | | [[#DIO|DIO_91]] / [[#MUXBUS|BUS_BHE#]] | ||
| 99 | | 99 | ||
! | ! | ||
| 100 | | 100 | ||
| [[#DIO| | | [[#DIO|DIO_92]] / [[#MUXBUS|BUS_CS#]] | ||
|} | |} | ||
Line 336: | Line 336: | ||
! N | ! N | ||
| 6 | | 6 | ||
| [[# | | [[#Syscon|RED_LED#]] | ||
|- | |- | ||
| [[#Ethernet Port|ETH_TX+]] | | [[#Ethernet Port|ETH_TX+]] | ||
Line 342: | Line 342: | ||
! 2 | ! 2 | ||
| 8 | | 8 | ||
| [[# | | [[#Syscon|GREEN_LED#]] | ||
|- | |- | ||
| [[#Ethernet Port|ETH_TX-]] | | [[#Ethernet Port|ETH_TX-]] | ||
Line 348: | Line 348: | ||
! | ! | ||
| 10 | | 10 | ||
| | | [[#DIO|GPIO_A31]] | ||
|- | |- | ||
| [[#Ethernet Port|ETH_CT]] | | [[#Ethernet Port|ETH_CT]] | ||
Line 354: | Line 354: | ||
! | ! | ||
| 12 | | 12 | ||
| | | [[#DIO|GPIO_B0]] | ||
|- | |- | ||
| 3.3V <ref name=33RAIL>The | | 3.3V <ref name=33RAIL>The System-on-Module regulates a 3.3V rail which can source up to 700mA by the baseboard. Note that each pin on the socket connector is only rated to 500mA so other 3.3V lines must also be used to get the full 700mA.</ref> | ||
| 13 | | 13 | ||
! C | ! C | ||
Line 386: | Line 386: | ||
| Reserved | | Reserved | ||
|- | |- | ||
| | | Reserved | ||
| 23 | | 23 | ||
! C | ! C | ||
Line 392: | Line 392: | ||
| Reserved | | Reserved | ||
|- | |- | ||
| | | Reserved | ||
| 25 | | 25 | ||
! N | ! N | ||
Line 414: | Line 414: | ||
! | ! | ||
| 32 | | 32 | ||
| | | [[#DIO|GPIO_B17]] | ||
|- | |- | ||
| CPU_CORE | | CPU_CORE | ||
Line 420: | Line 420: | ||
! C | ! C | ||
| 34 | | 34 | ||
| | | AUD_MCLK | ||
|- | |- | ||
| [[#USB | | [[#USB OTG|USB_OTG_M]] | ||
| 35 | | 35 | ||
! N | ! N | ||
| 36 | | 36 | ||
| | | [[#DIO|GPIO_B22]] | ||
|- | |- | ||
| [[#USB | | [[#USB OTG|USB_OTG_P]] | ||
| 37 | | 37 | ||
! 2 | ! 2 | ||
| 38 | | 38 | ||
| | | [[#DIO|GPIO_B23]] | ||
|- | |- | ||
| 3.3V <ref name=33RAIL /> | | 3.3V <ref name=33RAIL /> | ||
Line 438: | Line 438: | ||
! | ! | ||
| 40 | | 40 | ||
| | | [[#DIO|GPIO_B24]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 444: | Line 444: | ||
! | ! | ||
| 42 | | 42 | ||
| | | [[#DIO|GPIO_B25]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 458: | Line 458: | ||
| CPU_JTAG_TCK | | CPU_JTAG_TCK | ||
|- | |- | ||
| | | CPU_PCIE_TX1_M | ||
| 47 | | 47 | ||
! 2 | ! 2 | ||
Line 464: | Line 464: | ||
| CPU_JTAG_TDI | | CPU_JTAG_TDI | ||
|- | |- | ||
| | | CPU_PCIE_TX1_P | ||
| 49 | | 49 | ||
! | ! | ||
Line 470: | Line 470: | ||
| CPU_JTAG_TDO | | CPU_JTAG_TDO | ||
|- | |- | ||
| Ground | |||
| 51 | | 51 | ||
! | ! | ||
| 52 | | 52 | ||
| | | [[#DIO|DIO_73]] | ||
|- | |- | ||
| | | CPU_PCIE_RX1_M | ||
| 53 | | 53 | ||
! C | ! C | ||
| 54 | | 54 | ||
| [[#DIO| | | [[#DIO|DIO_72]] | ||
|- | |- | ||
| | | CPU_PCIE_RX1_P | ||
| 55 | | 55 | ||
! N | ! N | ||
| 56 | | 56 | ||
| [[#DIO| | | [[#DIO|DIO_71]] | ||
|- | |- | ||
| 1.8V | | DDR 1.8V <ref>Maximum off-board load on DDR_1.8V is 100mA</ref> | ||
| 57 | | 57 | ||
! 2 | ! 2 | ||
| 58 | | 58 | ||
| [[#DIO| | | [[#DIO|DIO_70]] | ||
|- | |- | ||
| | | PCIE_CLK3_M | ||
| 59 | | 59 | ||
! | ! | ||
| 60 | | 60 | ||
| [[#DIO| | | [[#DIO|DIO_69]] | ||
|- | |- | ||
| | | PCIE_CLK3_P | ||
| 61 | | 61 | ||
! | ! | ||
| 62 | | 62 | ||
| [[#DIO| | | [[#DIO|DIO_68]] | ||
|- | |- | ||
| | | 2.5V <ref>Maximum off-board load on 2.5V is 10mA</ref> | ||
| 63 | | 63 | ||
! C | ! C | ||
| 64 | | 64 | ||
| [[#DIO| | | [[#DIO|DIO_67]] | ||
|- | |- | ||
| [[# | | [[#SPI|SPI_CS]] | ||
| 65 | | 65 | ||
! N | ! N | ||
| 66 | | 66 | ||
| [[#DIO| | | [[#DIO|DIO_66]] | ||
|- | |- | ||
| [[#SPI|SPI_MOSI]] | | [[#SPI|SPI_MOSI]] | ||
Line 522: | Line 522: | ||
! 2 | ! 2 | ||
| 68 | | 68 | ||
| [[#DIO| | | [[#DIO|DIO_65]] | ||
|- | |- | ||
| [[#SPI|SPI_MISO]] | | [[#SPI|SPI_MISO]] | ||
Line 528: | Line 528: | ||
! | ! | ||
| 70 | | 70 | ||
| [[#DIO| | | [[#DIO|DIO_64]] | ||
|- | |- | ||
| [[#SPI|SPI_CLK]] | | [[#SPI|SPI_CLK]] | ||
Line 534: | Line 534: | ||
! | ! | ||
| 72 | | 72 | ||
| [[#DIO| | | [[#DIO|DIO_63]] | ||
|- | |- | ||
| Ground | | Ground | ||
Line 540: | Line 540: | ||
! C | ! C | ||
| 74 | | 74 | ||
| | | [[#USB OTG|USB_OTG_ID]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 546: | Line 546: | ||
! N | ! N | ||
| 76 | | 76 | ||
| | | [[#USB OTG|USB_OTG_5V]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 552: | Line 552: | ||
! 2 | ! 2 | ||
| 78 | | 78 | ||
| [[#DIO| | | [[#DIO|DIO_96]] / [[#COM Ports|XUART0_TXD]] | ||
|- | |- | ||
| 3.3V <ref name=33RAIL /> | | 3.3V <ref name=33RAIL /> | ||
Line 558: | Line 558: | ||
! | ! | ||
| 80 | | 80 | ||
| [[#DIO| | | [[#DIO|DIO_97]] / [[#COM Ports|UART0_RXD]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 564: | Line 564: | ||
! | ! | ||
| 82 | | 82 | ||
| [[#DIO| | | [[#DIO|DIO_98]] / [[#COM Ports|UART1_TXD]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 570: | Line 570: | ||
! C | ! C | ||
| 84 | | 84 | ||
| [[#DIO|DIO_99]] / [[#COM Ports|UART1_RXD]] | |||
|- | |- | ||
| Reserved | | Reserved | ||
Line 576: | Line 576: | ||
! N | ! N | ||
| 86 | | 86 | ||
| [[#DIO| | | [[#DIO|DIO_100]] / [[#COM Ports|UART2_TXD]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 582: | Line 582: | ||
! 2 | ! 2 | ||
| 88 | | 88 | ||
| [[#DIO| | | [[#DIO|DIO_101]] / [[#COM Ports|UART2_RXD]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 588: | Line 588: | ||
! | ! | ||
| 90 | | 90 | ||
| [[#DIO| | | [[#DIO|DIO_102]] / [[#COM Ports|UART3_TXD]] | ||
|- | |- | ||
| Reserved | | Reserved | ||
Line 594: | Line 594: | ||
! | ! | ||
| 92 | | 92 | ||
| [[#DIO| | | [[#DIO|DIO_103]] / [[#COM Ports|UART3_RXD]] | ||
|- | |- | ||
| [[# | | [[#Get a Console|DEBUG_TXD]] | ||
| 93 | | 93 | ||
! C | ! C | ||
| 94 | | 94 | ||
| [[#DIO| | | [[#DIO|DIO_104]] / [[#COM Ports|UART4_TXD]] | ||
|- | |- | ||
| [[# | | [[#Get a Console|DEBUG_RXD]] | ||
| 95 | | 95 | ||
! N | ! N | ||
| 96 | | 96 | ||
| [[#DIO|DIO_105]] / [[#COM Ports|UART4_RXD]] | |||
|- | |- | ||
| [[#DIO|DIO_15]] / [[#CAN|CAN_TXD]] | | [[#DIO|DIO_15]] / [[#CAN|CAN_TXD]] | ||
Line 612: | Line 612: | ||
! 2 | ! 2 | ||
| 98 | | 98 | ||
| [[#DIO| | | [[#DIO|DIO_106]] / [[#COM Ports|UART5_TXD]] | ||
|- | |- | ||
| [[#DIO|DIO_16]] / [[#CAN|CAN_RXD]] | | [[#DIO|DIO_16]] / [[#CAN|CAN_RXD]] | ||
Line 618: | Line 618: | ||
! | ! | ||
| 100 | | 100 | ||
| [[#DIO| | | [[#DIO|DIO_107]] / [[#COM Ports|UART5_RXD]] | ||
|} | |} | ||
|} | |} | ||
<references /> | <references /> |
Latest revision as of 11:25, 13 June 2023
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- ↑ 1.0 1.1 1.2 1.3 The FPGA JTAG pins are not recommended for use and are not supported. See the #FPGA Programming section for the recommended method to reprogram the FPGA.
- ↑ EXT_RESET# is an input used to reboot the CPU. Do not drive active high, use open drain.
- ↑ On our baseboard designs this pin is typically used to toggle power to the USB 5V rail.
- ↑ The off board reset is driven low to reset all peripherals.
- ↑ 5.0 5.1 5.2 5.3 Power pins all supply power to the module. Apply 4.0V to 5.5V to these pins.
- ↑ Optionally you can connect a 3.3V battery to this pin to keep the RTC alive between reboots and while the 5V rail is down.
- ↑ On our off the shelf baseboards this is used to toggle the 3.3V power supply for an LCD interface such as on the TS-8390.
- ↑ 8.0 8.1 8.2 8.3 8.4 These are SPI flash pins. Custom baseboard designs can contain their own supported SPI flash chip which can be used to boot, or access with spiflashctl.
- ↑ 9.0 9.1 9.2 The System-on-Module regulates a 3.3V rail which can source up to 700mA by the baseboard. Note that each pin on the socket connector is only rated to 500mA so other 3.3V lines must also be used to get the full 700mA.
- ↑ Maximum off-board load on DDR_1.8V is 100mA
- ↑ Maximum off-board load on 2.5V is 10mA