4700 FPGA Functionality: Difference between revisions

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All macrocontrollers feature an FPGA. Any external interfaces called for by the TS-SOCKET specification that are not provided by the CPU are implemented in the FPGA whenever possible.  The FPGA is connected to the CPU by a static memory controller, and as a result the FPGA can provide registers in the CPU memory space.
All macrocontrollers feature an FPGA. Any external interfaces called for by the TS-SOCKET specification that are not provided by the CPU are implemented in the FPGA whenever possible.  The FPGA is connected to the CPU by a static memory controller, and as a result the FPGA can provide registers in the CPU memory space.


While most common functionality for the TS-4700 is accessed through layers of software that are already written, some features may require talking directly to the FPGA.  The TS-4700 provides access to the FPGA in an 8 bit region and a 16 bit region. The 8 bit base address is 0x81000000. The 16 bit base address is 0x80000000. Most registers inside the TS-4700 FPGA are 16 bit registers and should be accessed via the 16 bit space. The 8 bit space is mostly needed for off-board 8 bit devices on the MUXBUS, however it is also used for some onboard device controls, such as CAN. To access hardware cores in the FPGA, add the offset in the table below to the base address.  
While most common functionality for the TS-4700 is accessed through layers of software that are already written, some features may require talking directly to the FPGA.  The TS-4700 provides access to the FPGA in an 8 bit region and a 16 bit region. Most registers inside the TS-4700 FPGA are 16 bit registers and should be accessed via the 16 bit space. The 8 bit space is mostly needed for off-board 8 bit devices on the MUXBUS, however it is also used for some onboard device controls, such as CAN. To access hardware cores in the FPGA, add the offset in the table below to the base address.  
 
{|class=wikitable
! Bit Width
! Base Address
|-
| 16
| 0x80000000
|-
| 8
| 0x81000000
|}


{|class=wikitable
{|class=wikitable
! Offset
! Offset
! Usage
! Usage
! Base
! Bit Width
|-
|-
| 0x0000
| 0x0000
| 16KB blockram access (for XUART buffer)
| 16KB blockram access (for XUART buffer)
| 0x80000000 - 16 bit
| 16
|-
|-
| 0x4000
| 0x4000
| Syscon registers
| Syscon registers
| 0x80000000 - 16 bit
| 16
|-
|-
| 0x4400
| 0x4400
| ADC registers (for off-board ADC)
| ADC registers (for off-board ADC)
| 0x80000000 - 16 bit
| 16
|-
|-
| 0x4800
| 0x4800
| SPI interface
| SPI interface
| 0x80000000 - 16 bit
| 16
|-
|-
| 0x4C00
| 0x4C00
| CAN controller interface
| CAN controller interface
| 0x81000000 - 8 bit
| 8
|-
|-
| 0x4D00
| 0x4D00
| 2nd CAN controller (not implemented)
| 2nd CAN controller
| not implemented
|  
|-
|-
| 0x5000
| 0x5000
| Touchscreen registers
| Touchscreen registers
| 0x80000000 - 16 bit
| 16
|-
|-
| 0x5400
| 0x5400
| XUART IO registers
| XUART IO registers
| 0x80000000 - 16 bit
| 16
|-
|-
| 0x8000
| 0x8000
| 32KB MUXBUS space
| 32KB MUXBUS space
| Variable
| 16/8
|}
|}

Revision as of 14:19, 8 February 2012

All macrocontrollers feature an FPGA. Any external interfaces called for by the TS-SOCKET specification that are not provided by the CPU are implemented in the FPGA whenever possible. The FPGA is connected to the CPU by a static memory controller, and as a result the FPGA can provide registers in the CPU memory space.

While most common functionality for the TS-4700 is accessed through layers of software that are already written, some features may require talking directly to the FPGA. The TS-4700 provides access to the FPGA in an 8 bit region and a 16 bit region. Most registers inside the TS-4700 FPGA are 16 bit registers and should be accessed via the 16 bit space. The 8 bit space is mostly needed for off-board 8 bit devices on the MUXBUS, however it is also used for some onboard device controls, such as CAN. To access hardware cores in the FPGA, add the offset in the table below to the base address.

Bit Width Base Address
16 0x80000000
8 0x81000000
Offset Usage Bit Width
0x0000 16KB blockram access (for XUART buffer) 16
0x4000 Syscon registers 16
0x4400 ADC registers (for off-board ADC) 16
0x4800 SPI interface 16
0x4C00 CAN controller interface 8
0x4D00 2nd CAN controller
0x5000 Touchscreen registers 16
0x5400 XUART IO registers 16
0x8000 32KB MUXBUS space 16/8