4710 FPGA bitstreams: Difference between revisions

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m (Links auto-updated for 2022 re-branding ( https://files.embeddedarm.com/ts-socket-macrocontrollers/ts-4710-linux/binaries/ts-bitstreams/ts4710-fpga-rev4-default-ADC.vme.bz2 →‎ https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4710-linux/binaries/ts-bitstreams/ts4710-fpga-rev4-default-ADC.vme.bz2 http://www.embeddedarm.com/support/contact-us.php →‎ http://www.embeddedTS.com/support/contact-us.php))
 
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The FPGA has the capability to be reloaded on startup and reprogram itself with different configurations.  The default bitstream is hardcoded into the FPGA, but the soft reloaded bitstreams can be placed in /ts/ts<model>_bitstream.vme.gz on the Debian root to make the board load the bitstream on startup.  If we do not have a configuration you need, you can [[#FPGA Programming|build a new bitstream]], or [http://www.embeddedarm.com/support/contact-us.php contact us] for our engineering services.
The FPGA has the capability to be reloaded on startup and reprogram itself with different configurations.  The default bitstream is hardcoded into the FPGA, but the soft reloaded bitstreams can be placed in /ts/ts<model>-fpga.vme.gz on the Debian root to make the board load the bitstream on startup.  If we do not have a configuration you need, you can [[#FPGA Programming|build a new bitstream]], or [http://www.embeddedTS.com/support/contact-us.php contact us] for our engineering services.


{| class=wikitable
{| class=wikitable
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| Off
| Off
|-
|-
| [ftp://ftp.embeddedarm.com/ts-socket-macrocontrollers/ts-4710-linux/binaries/ts-bitstreams/ts4710-fpga-rev3-default-ADC.vme.bz2 ts4710-fpga-rev3-default-ADC.vme.bz2]
| [https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4710-linux/binaries/ts-bitstreams/ts4710-fpga-rev4-default-ADC.vme.bz2 ts4710-fpga-rev4-default-ADC.vme.bz2]
| 0-6
| 0-6
| On
| On
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| On
| On
|}
|}
{| class=wikitable
|+ FPGA Revision Log
|-
! Revision
! Changes
|-
| 3
|
* Opencore fixed to meet timing (previous opencores would cause SD corruption on writes)
* reduced to 6 xuarts to help meet timing
* 8-bit I/O fixed
* Added auto mute TX when TXEN enabled on XUARTs
* Added optional 14.3MHz clock
|-
| 2
|
* Added alternate touch screen pin location
* Added optional 25MHz clock
|-
| 1
| Enabled XUARTs and CAN
|-
| 0
| Initial release
|}
You can update to the latest FPGA by booting to Debian and running:
<source lang=bash>
cd /ts/
wget ftp://ftp.embeddedarm.com/ts-socket-macrocontrollers/ts-4710-linux/binaries/ts-bitstreams/ts4710-fpga-latest.vme.bz2
# The TS-4710 and TS-4712 use the same FPGA.  This will
# move it to the correct name for either.
mv ts4710-fpga-latest.vme.bz2 ts$(cat /dev/tsmodel)-fpga.vme.bz2
</source>
The FPGA is loaded in to the FPGA SRAM on every load, so this file will need to exist for all future boots.

Latest revision as of 16:24, 17 January 2022

The FPGA has the capability to be reloaded on startup and reprogram itself with different configurations. The default bitstream is hardcoded into the FPGA, but the soft reloaded bitstreams can be placed in /ts/ts<model>-fpga.vme.gz on the Debian root to make the board load the bitstream on startup. If we do not have a configuration you need, you can build a new bitstream, or contact us for our engineering services.

Bitstream XUARTs CAN Touchscreen SPI ADC
Default (8K LUT) 0-6 On On On Off
ts4710-fpga-rev4-default-ADC.vme.bz2 0-6 On On On On
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