81x0-registermap: Difference between revisions
From embeddedTS Manuals
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Line 68: | Line 68: | ||
| rowspan=8 | 0x6 | | rowspan=8 | 0x6 | ||
| 7:0 | | 7:0 | ||
| Read | | Read/Write | ||
| LCD pins 14:7 output data | | LCD pins 14:7 output data | ||
|- | |- | ||
Line 135: | Line 135: | ||
| rowspan=3 | 0xc | | rowspan=3 | 0xc | ||
| 7:0 | | 7:0 | ||
| Read | | Read Only | ||
| DIO Header dd pins 15:1 input data | | DIO Header dd pins 15:1 input data | ||
|- | |- | ||
| 13:8 | | 13:8 | ||
| Read | | Read Only | ||
| PC104 A21:A16 input data | | PC104 A21:A16 input data | ||
|- | |- | ||
| 15:14 | | 15:14 | ||
| Read | | Read Only | ||
| PC104 B12:B11 input data | | PC104 B12:B11 input data | ||
|- | |- | ||
Line 152: | Line 152: | ||
|- | |- | ||
| 8 | | 8 | ||
| Read | | Read Only | ||
| LCD Write/Read (pin 6) input data | | LCD Write/Read (pin 6) input data | ||
|- | |- | ||
| 9 | | 9 | ||
| Read | | Read Only | ||
| LCD Register Select (pin 3) input data | | LCD Register Select (pin 3) input data | ||
|- | |- | ||
| 10 | | 10 | ||
| Read | | Read Only | ||
| LCD Enable (pin 5) input data | | LCD Enable (pin 5) input data | ||
|- | |- |
Revision as of 23:29, 29 January 2013
Offset | Bits | Access | Description |
---|---|---|---|
0x0 | 15:0 | Read Only | Board ID (0x8100) |
0x2 | 3:0 | Read Only | PLD revision |
7:4 | Read/Write | Value to control PWM for LCD contrast | |
8 | Read/Write | TS-8100 USB Reset | |
9 | Read/Write | Controls ISA_RESET on the PC104 bus | |
10 | Read/Write | Enables a 14.3MHZ clock on the PC104 bus (B30) and the PLD (default 1) | |
11 | Read/Write | Enables the RS232 transceiver (default 1) | |
12 | Read/Write | Toggles 5V to the LCD header pin 1 | |
13 | Read/Write | Enable CAN1 standby | |
14 | Read/Write | Enable CAN2 standby | |
15 | Read/Write | Enables the PWM output for the contrast value | |
0x4 | 7:0 | Read/Write | DIO odd pins 15:1 output data |
13:8 | Read/Write | PC104 header B12:B11 output data | |
15:14 | Read/Write | PC104 header B12:B11 output data | |
0x6 | 7:0 | Read/Write | LCD pins 14:7 output data |
8 | Read/Write | LCD Header pin 6 output data | |
9 | Read/Write | LCD Header pin 3 output data | |
10 | Read/Write | LCD Header pin 5 output data | |
11 | Read/Write | AVR MOSI | |
12 | Read/Write | AVR SCLK | |
13 | Read/Write | AVR RESET | |
14:15 | N/A | Reserved | |
0x8 | 7:0 | Read/Write | DIO Header odd pins 15:1 data direction |
13:8 | Read/Write | PC104 A21:A16 data direction | |
15:14 | Read/Write | PC104 B12:B11 data direction | |
0xa | 7:0 | Read/Write | LCD pins 14:7 data direction |
8 | Read/Write | LCD Header pin 6 data direction | |
9 | Read/Write | LCD Header pin 3 data direction | |
10 | Read/Write | LCD Header pin 5 data direction | |
15:11 | N/A | Reserved | |
0xc | 7:0 | Read Only | DIO Header dd pins 15:1 input data |
13:8 | Read Only | PC104 A21:A16 input data | |
15:14 | Read Only | PC104 B12:B11 input data | |
0xe | 7:0 | Read Only | LCD header pins 14-7 input data |
8 | Read Only | LCD Write/Read (pin 6) input data | |
9 | Read Only | LCD Register Select (pin 3) input data | |
10 | Read Only | LCD Enable (pin 5) input data | |
11 | Read/Write | AVR MISO | |
15:12 | N/A | Reserved |