TS-2200

TS-2200

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Further References
Intel 386EX User's Guide
Maxim Integrated Products
Omen Technologies
PC/104 Consortium Web Site
Crystal CS8900A Ethernet Controller Overview

Introduction

The model TS-2200 is a compact, full-featured PC compatible Single Board Computer based on the 386EX processor. If you are coming up from the 8-bit microcontroller world, you will find that this product provides much more performance and much quicker development since you can now use standard PC development tools such as Turbo C or Quick Basic. If you have done work in the PC world in the past, you will find you can now build applications for a very small target that does not require a keyboard, video, floppy disks, or hard drives.

You can typically write and debug code on a host PC using standard development tools for the PC platform, then simply copy it to and run it on the TS-2200 without modification. If additional peripherals are required, the PC/104 expansion bus allows for many standard functions available off-the-shelf. It is also very simple to create a custom PC/104 daughter board for those special features that differentiate your product. Technologic Systems can provide technical support as well as a free quotation for any custom hardware, software, or BIOS modifications you may require.

This manual is fairly short. This is because for the most part, the TS-2200 is a standard 80386 based PC compatible computer, and there are hundreds of books about writing software for the PC platform. The purpose of this manual is documenting where the TS-2200 differs from a standard PC.

PC Compatibility

PC compatibility requires much more than just a 386 processor. It requires PC compatible memory and I/O maps as well as a PC compatible BIOS. The General Software EMBEDDED BIOS offers a high degree of compatibility with past and present BIOS standards allowing it to run off-the shelf operating systems and application software.

The EMBEDDED BIOS has been tested with all major versions of DOS, including MS-DOS, DR-DOS, and Embedded DOS 6-XL; all major versions of OS/2, including MS-OS/2 and IBM OS/2; MS Windows 3.1, Windows-95, Windows NT, and NetWare 386.

Technologic Systems Embedded PCs are compatible with a wide variety of x86 based operating systems. A partial list OSes currently used with our boards by customers includes:

• GNU/Linux, kernel versions 1.0.x, 2.0.x, and 2.2.x
• TNT Embedded Toolsuite, Phar Lap Software
• RTKernel, On Time Software
• RTEMS, On-Line Applications Research Corporation
• DOS with Waterloo TCP (WATTCP), public domain TCP/IP source code for DOS

Power

The TS-2200 requires regulated +5VDC at 650mA (typical). A quick release screw-down terminal block for the +5V power and power GND connections is provided for easy connection to an external power supply.

When power is first supplied to the TS-2200, the board mounted LED (labeled D2) is immediately turned on under hardware control. Once the processor begins execution, the LED is turned off under software control. If the LED does not turn on at all, the most likely problem is the power supply. Check that the +5V and GND connections are not reversed. A diode protects the board against damage in such a situation, but it will not run.

Please note that supply voltages over +6VDC may damage the TS-2200. Be sure to use a regulated +5VDC power supply.

Memory

DRAM

The TS-2200 has a total of 2 Megabytes of DRAM providing 640 KB of base memory, 1 Megabyte of extended memory, and 128 KB of shadow RAM for the BIOS and DOS-ROM. This is identical to a standard PC memory map. The Flash SSD is the exception -- see below for details.

As shipped, the 1 Megabyte of extended memory is used as a RAM disk by the vdisk.sys device driver. The RAM disk is accessible as drive C: if the DiskOnChip Flash disk is not installed, drive D: if it is. The size of the disk can be reduced to provide extended memory for an application (or simply removed entirely) by editing the CONFIG.SYS file in the root directory of drive A:.

Flash

There is a total of 1 MB of Flash memory on the TS-2200. The top 128 KB of Flash are reserved for the BIOS and DOS-ROM. During POST, they are copied from Flash into DRAM at addresses E0000h through FFFFFh for improved performance (a standard technique known as BIOS Shadowing). The remainder of the Flash memory (896 KB) is used by a SSD (solid state disk) appearing as drive A. The SSD is fully supported by the BIOS as an INT 13h drive.

The physical Flash memory is accessed by the BIOS through a 64 KB memory mapped window at addresses D0000h through DFFFFh. If you are installing a PC/104 daughter card that uses memory mapped I/O, it must not conflict with this address range.

The Flash memory is guaranteed capable of a minimum of 100,000 write/erase cycles. This means that if you completely erase and rewrite the SSD drive 10 times a day you have over 27 years before any problems would occur. Reading the SSD produces no wear at all.

Flash Expansion

If 896 KB of Flash is insufficient for your application, an empty 32-pin socket is available for Flash expansion using an M-Systems DiskOnChip 2000 or DiskOnChip Millennium Flash Drive. This product is a wonder of miniaturization; it is a complete Flash SSD in a single 32 pin package currently available in sizes from 4 MB up to 144 MB. The DiskOnChip is available from Technologic Systems as well as other distributors. It is compatible with DOS as shipped, and drivers for other operating systems are available.

When using the DiskOnChip, it will simply appear as drive C: The DiskOnChip is accessed through an 8 KB range of CE000h through CFFFFh in memory space. If you are installing a PC/104 daughter card that uses memory mapped I/O, it must not conflict with this address range if the DiskOnChip is installed. Additionally, the DiskOnChip firmware uses approximately 20 KB of user RAM (below 640 KB).

Battery-Backed SRAM

The 32-pin socket can also optionally hold 32 KB of battery-backed CMOS SRAM memory. This or the DiskOnChip may be installed, but not both.

Battery backed SRAM provides non-volatile memory with unlimited write cycles and no write time degradation, unlike Flash memory. The SRAM uses an additional 32 KB range of C8000h through CFFFFh. If the SRAM is installed, PC/104 daughter card that uses memory mapped I/O must not conflict with this address range.

The SRAM can be utilized as a RAM disk (drive C:) by the TSRAMDSK.SYS device driver. The device driver can be added or removed (and the SRAM accessed directly) by editing the associated line in the CONFIG.SYS file in the root directory of drive A:. Please see the BIOS/DOS User's Manual for further information on TSRAMDSK.SYS.

I/O 75h, bit 0 can be read to determine whether the SRAM option is installed; a �1� in bit 0 indicates that it is installed, a �0� that it is not.

Serial Ports

The two PC compatible asynchronous serial ports provide a means to communicate with external serial devices such as printers, modems, etc. Each is independently configured as a standard PC COM port which is compatible with the National Semiconductor NS16C450. COM1 appears in the I/O space at 3F8h � 3FFh and uses IRQ4. COM2 is located at 2F8h � 2FFh and uses IRQ3.

The COM ports use a master clock of 1.8519 MHz as compared to a standard clock of 1.8432 MHz. This results in an error for all baud rates of .0047 (less than � %). The error is insignificant and this clock value allows standard baud rate selections -- for example a divisor of 12 yields 9600 baud. By changing an internal configuration register in the 386EX, the serial clock can be switched to 12.5 MHz (the processor clock divided by 2). This feature allows baud rates higher than 115 Kbaud (up to 781 Kbaud), as well as low error, non-standard lower baud rates (such as 24 Kbaud). See Appendix F for further information.

The COM ports may also be configured to use a DMA channel, which is handy when very high baud rates are being used. When enabled, a DMA request is issued any time a serial port�s receive buffer is full or its transmit buffer is empty. This allows higher speed operation with much lower CPU overhead. See the Intel 386EX User's Manual for further details.

Serial Port Configuration Registers

Because both serial ports are 100% PC compatible, software written for the PC that accesses serial ports directly or through standard BIOS calls will work without modification on the TS-2200. The details of the COM port internal registers are available in most PC documentation books or the data sheet for the National Semiconductor NS16C450 may be consulted.

Serial Port Hardware

Each serial port has 4 lines buffered: the two data lines and the CTS / RTS handshake pair. This is quite sufficient to interface with the vast majority of serial devices. The serial lines are routed to 10 pin headers labeled COM1 and COM2. A serial adapter cable can be plugged into the header to convert this into a standard DB9 male connector. The pin out for the 10 pin header and DB9 male connector are listed below. The RTS signal also drives the DTR pin on the serial ports; DTR is always the same state as RTS. In addition, RTS is also used to enable the RS-485 transmitter (see below for more details).

Figure 1 - Serial Port Header and DB9 Pinout
[signal direction is in brackets]

NC	10	5	GND
NC	9	4	DTR (RTS) [out]
[in] CTS	8	3	TX data [out]
[out] RTS	7	2	RX data [in]
NC	6	1	NC

Note:

The serial port headers use a non-standard numbering scheme. This was done so the header pins would have the same numbering as the corresponding DB-9 pin; i.e. pin 8 (CTS) on the header connects to pin 8 on the DB-9

RS-485 / RS-422 Support

RS-485 Quick start procedure

1. The RS-485 option must be installed
2. Install JP6 or JP7 to enable Half or Full duplex RS-485 operation
3. Attach the RS-485 cable to the 5-pin terminal strip connector.
4. Set the COM1 UART serial parameters (baud rate, data, parity, and stop bits, interrupts, etc).
5. To transmit data, assert RTS and write the data to the UART
6. To receive data, deassert RTS and read the data from the UART

An option is available to add support to COM1 for half or full-duplex RS-485. RS-485 drivers allow communications between multiple nodes up to 4000 feet (1200 meters) via twisted pair cable. Halfduplex RS-485 requires one twisted pair plus a Ground connection, while full-duplex RS-485 (also known as RS-422) requires two twisted pairs plus a Ground connection.

For half-duplex operation, a single twisted pair is used for transmitting and receiving. The serial port's RTS signal controls the RS-485 transmitter/receiver (see next section for automatic operation). When RTS is asserted true (bit 1 of the modem control register = 1), the RS-485 transmitter is enabled and the receiver disabled. When RTS is de-asserted the transmitter is tri-stated (disabled) and the receiver is enabled. Since the transmitter and receiver are never both enabled, the serial port UART does not receive the data transmitted. The transmitter and receiver share a single pair of signals that are available in a screw-down terminal block. See the table below for pin-outs Note: the correct jumper must be installed. See the next table for details.

Table 1 - RS-485 Signals

Position (with terminal strip facing you)	Left		Center		Right
Silk-screen Label	TX+	TX-	GND	RX-	RX+
Half-duplex Usage	TX+ / RX+	TX- / RX-	GND	Not Used	Not Used
Full-duplex Usage	TX+	TX-	GND	RX-	RX+

Table 3 - COM1 Receiver Source

Jumper	Receiver Source
JP6	Full-duplex RS-485
JP7	Half-duplex RS-485
neither	RS-232

Table 2 � TS-2100 Control Registers � All signals are R/W through bit 0 of the address

I/O Address	R / W	Bit 0 Description
76h	Read	RS-485 option 0 = Not installed 1 = Option installed
76h	Write	RS-485 control 0 = use RTS enabled RS-485 1 = enable automatic RS-485
77h	Read	Returns status of TX485EN pin

For full duplex (RS-422) operation, a twisted pair is used for receiving and another twisted pair is used for transmitting. The RS-485 transmitter is typically enabled continuously (RTS asserted), since the separate transmit and receive twisted pairs remove problems with data loop-back. The full-duplex receiver inputs are available on the terminal block (see the table above). Note: the correct jumper must be installed - see the table below for details.

Fail-safe bias resistors are used to bias both the TX pair and the RX pair to the correct state when these pairs are not being actively driven. This is an important consideration, since in a typical RS-485 installation, the drivers are frequently tri-stated. If fail-safe bias resistors are not present, the 485 bus will be floating and very small amounts of noise can cause spurious characters at the receivers. A 1.2 KOhm resistor is used to pull the TX+ signal to 5V and another 1.2 KOhm resistor pulls the TX- signal to ground. The RX+ and RX- signals are biased in the same manner. Termination resistors are also required for reliable operation particularly when running long distances. Termination resistors should only be installed at each end of a RS-485 transmission line pair. In a multi-drop application where there are several drivers and/or receivers attached, only the devices at each end of the transmission line pair should have termination resistors.

Installing JP4 adds a 100 Ohm termination resistor to the RX pair while JP5 adds a 100 Ohm termination resistor to the TX pair.

When the RS-485 option is installed, jumpers JP6 and JP7 select which receiver is fed to the COM1 UART. Only one (or neither) of these jumpers should be installed at a time!

A read at I/O location 76h bit 0 will return a "1" when the RS-485 option is installed.

Automatically Enabled RS-485

In most RS-485 applications, the transmitter is enabled while sending data and disabled (tri-stated) when not. This allows for an inexpensive 'network' of multiple devices, all using a single twisted pair to communicate. Enabling and disabling the RS-485 transmitters can be done in software by asserting and deasserting RTS. This can be difficult to implement and bug prone.

A simpler method implemented on the TS-2200 utilizes Timer 2 in the i386EX to keep track of the bits shifting out of the UART. It automatically turns on the transmitter, waits for the character to be sent, then turns off the transmitter. The timer is simply initialized once based on baud rate and data format. This totally eliminates the software overhead of controlling the RTS line manually.

To activate automatic transmitter enable, I/O location 76h bit 0 must be set to a "1", and Timer 2 initialized. When I/O location 76h bit 0 is set to "0", user software uses the RTS line to control the RS-485 transmitter. (Set RTS, and the transmitter is enabled. Clear RTS, and it is disabled.)

To initialize Timer 2, a value of 0B2h must be written to I/O location 043h, then a 16 bit count must be written to I/O location 042h as two consecutive bytes with least significant byte first. The count is determined by the following equation:

Count = [16 * (Baud Divisor) * (Bits/Character)] - 2

For example, for 9600 baud, 8 data, no parity, 1 stop bit:

Baud divisor = 12
Bits/Character = 1 start bit + 8 data bits + 0 parity bits + 1 stop bit = 10
Count = [16 * 12 * 10] - 2 = 1918 decimal = 077Eh

The instructions in x86 assembly would then be:
   MOV AH, 0B2h
   OUT 043h, AH ; Set timer2 mode to one-shot
   MOV AH, 07Eh
   OUT 042h, AH ; load timer2 LSB
   MOV AH, 07h
   OUT 042h, AH ; load timer2 MSB

Table 4 - Auto Enabled RS-485 Examples

Serial Format	Formula	Result (decimal)	MSB	LSB
9600, No parity, 8 Data, 1 Stop	[16 * 12 * 10] - 2 =	1918	07h	7Eh
19200, No parity, 7 Data, 1 Stop	[16 * 6 * 9] - 2 =	862	03h	5Eh
9600, Even parity, 8 Data, 2 Stop	[16 * 12 * 12] - 2 =	2302	08h	0FEh
2400, Space parity, 8 Data, 1 Stop	[16 * 48 * 11] - 2 =	8446 20h 0FEh

Note:

These equations assume the standard 1.85 MHz clock is being used for baud rate generation. If the 12.5 MHz clock is being used (see Appendix F) these equations must be modified. Contact Technologic Systems for details.

Adding Serial Ports

If your project requires more than two serial ports, additional ports may be added via the PC/104 expansion bus. Technologic Systems currently offers a 2 serial / 1 parallel port card, and other manufacturers sell cards with up to four additional serial ports. Typically these would be configured as COM3 or COM4 or be assigned other non-standard I/O locations. Because DOS only directly supports four serial ports, any additional ports beyond four will require software drivers.

The PC/104 bus has IRQ3, 4, 5, 6, 7 or 9 available for additional serial ports. If IRQ3 or 4 are to be used on a PC/104 expansion card, then care must be taken since COM2 and COM1 also use these IRQs, respectively. For example, if IRQ4 is used for COM3 then either COM1 must be used in a noninterrupt fashion or only one COM port can have the interrupt enabled at a time. In any case only one COM should have the Interrupt Enable (Bit 3 of Modem Control Reg.) set at any one time if they share the same IRQ. This is a standard issue with the PC architecture. A better solution is to simply use interrupts other than 3 or 4 for additional serial ports.

Digital I/O

DIO1 Header

Figure 2 - DIO Header Pinout

P3.2	14	13	IRQ5 / P3.3
IRQ4 / P3.0	12	11	IRQ3 / P3.1
DTR2 / SRXCLK	10	9	RI2 / SRXD
DSR2 / STXCLK	8	7	RTS2 / STXD
IRQ7 / P3.5	6	5	P1.0
P1.5	4	3	P3.6
GND	2	1	5V

The DIO1 port provides +5V, GND, and 12 digital I/O lines that may be used to interface the TS-2200 with a wide range of external devices. Additional digital I/O is available on the DIO2 header. These signals are connected directly to the 386EX and several have multiple functions. For example, DIO pins 6, 11, 12, and 13 are by default IRQ7, IRQ3, IRQ4, and IRQ5 respectively. By setting configuration registers in the 386EX, these pins can be individually changed to general purpose I/O (GPIO) as high-impedance inputs, open-drain outputs, or complementary outputs. Note that these same signals are also connected directly to the PC/104 bus; if a pin is configured as GPIO, then the associated IRQ will not be available for PC/104 expansion cards.

DIO pins 7-10 can be configured as a synchronous serial port supporting baud rates to 6.25Mbaud. These pins are COM2 handshake lines by default that can be also used as GPIO. DIO pins 3, 4, 5, and 14 are always GPIO � they do not have secondary functions.

All digital outputs can source or sink up to 8mA. All digital inputs have standard TTL level thresholds.

For further information on configuration and use of these pins, see Appendix G.

DIO2 Header

Figure 3 � DIO2 Header Pinout

P1.3	14	13	IRQ6 / P3.4
TX485EN	12	11	LinkLED#
DCD2	10	9	RxLED#
RTS1 / P1.1	8	7	IN1@77
P1.2	6	5	IN2@77
LED-ON	4	3	IN3@77
GND	2	1	IN4@77

Up to 13 additional DIO lines are available on the DIO2 Header. Pins 1,3,5,and 7 are digital inputs with 10K Ohm pull-up resistors that can be read at I/O location 77h bits 1-4. Pin 4 is a Digital output that drives the TS-2200 LED. Pins 6,8,13,and 14 are i386EX programmable I/O lines. Pin 10 is a fixed input that can be read (inverted polarity) at the COM2 Status Reg. (I/O location 2FEh bit 7). Pin 12 is the signal that enables the RS-485 Transmit driver. If the RS-485 option is not installed, this pin can be read as input at I/O location 77h bit 0. Pins 9 and 11 are open-drain active-low outputs that drive the Ethernet Link and LAN LEDs. The default configuration is for these to be driven by the Ethernet controller to indicate network presence and activity. These can be reprogrammed to be general-purpose outputs. For more information regarding these 2 lines, please consult the Cirrus Logic CS8900A Users Guide in Appendix H.

Note � DIO2 pin 14 (P1.3) is also shared with user jumper JP3. If user jumper JP3 is being used, then DIO2 pin 14 should be left not connected. For further information on configuration and use of these pins, See Appendix G.

LCD Interface

Table 5 - LCD Header Signals

Pin	Function	Comments
1	LCD 5V
2	LCD GND
3	Reg. Select	Buffered A0
4	Bias	470 Ohm to GND
5	LCD Enable	Active high
6	Write#	Active low
7	D1	D0 � D7: Buffered bi-directional data bus
8	D0
9	D3
10	D2
11	D5
12	D4
13	D7
14	D6

Figure 4 - LCD Header Pinout

2	4	6	8	10	12	14
1	3	5	7	9	11	13

A 14-pin LCD connector is provided on the TS-2200 for interfacing with standard alphanumeric LCD displays. These displays use a common controller, the Hitachi HD44780 or equivalent. While software written for the HD44780 will work with all displays using the controller, the cable needed is dependent on the display used. For most displays, a straight-through type ribbon cable can be used. The connector on the LCD display is typically mounted on the backside of the display. Warning � using an incorrect cable or mounting the LCD connector on the front-side can result in a reverse power polarity and can damage the LCD display. Please refer to your LCD data sheets for in-depth information.

The TS-2200 BIOS incorporates a fairly complete set of INT10h video routines that work with the LCD. Once the LCD has been enabled (INT15h/Func B042h � see 0 below) the LCD can be written to using the standard BIOS routines. This includes the majority of PC languages, such as C and C++. See the programs included on the utility disk for examples.

I/O addresses 72h and 73h are used to access the LCD. Figure 4 shows the header pin-out, while Table 5 lists the LCD signals. The section below will briefly describe the LCD interface signals.

The register select signal is simply the buffered A0 address line. Thus, reads and writes to 72h cause register select to be low, and those to 73h cause it to be high. Generally the LCD uses this line to separate data bytes from command bytes. See your LCD data sheet for details.

The /Write signal is an active low write enable line. LCD Select is an active high signal, raised whenever the LCD addresses are being read or written. D0 � D7 are bi-directional, buffered copies of the data bus and carry all data and commands to the LCD.

Table 4 is not the standard pin-outs given for LCD displays. But this pin-out allows a standard ribbon cable to be used when the ribbon cable is attached to the backside of the LCD.

10Base-T Ethernet Port

The TS-2200 has full-function IEEE 802.3 Ethernet capability (10 Mbit/sec) provided by a Cirrus Logic CS8900A Ethernet controller. The CS8900A is a single-chip, 16-bit Ethernet controller that includes such features as full-duplex operation, power saving shutdown modes, and LED indicators for link status and activity. The physical interface is 10Base-T (RJ45 connector).

The TS-2200 has both a LINK LED and a LAN LED that indicates the current ethernet status. The LINK LED (labeled D4) is active when valid ethernet link pulses are detected. This LED should be ON whenever the TS-2200 is powered on and properly connected to a 10BaseT Ethernet network. The LAN LED (labeled D3) should pulse ON briefly when any network traffic is detected. This includes all traffic, not just that sent to or from the TS-2200. Both of these LEDs are controlled by the CS8900A and do not require initialization. Additionally, the LEDs can be placed under software control, allowing the customer application use of the LEDs for feedback. Please see the CS8900A User Manual, Appendix H, for further details.

A standard packet driver is installed on the board by default, along with a few sample network applications written with the public domain Waterloo TCP/IP software (WATTCP). WATTCP is a freely available package (including source code) that provides TCP/IP connectivity for programs written for the DOS environment.

During POST, the BIOS initializes the CS8900A registers with the correct settings � interrupt IRQ12, I/O address range 300h � 30Fh, and I/O mapped operation. The DOS packet driver is loaded by AUTOEXEC.BAT once DOS starts. To run the sample programs (ping and finger) on the TS-2200, first examine the contents of the WATTCP.CFG configuration file in the A:\ETHERNET directory and correct any information that is not valid for your particular network. Then simply run a sample program from the DOS command line. For example:

[A:\]ping www.embeddedx86.com
Technologic Systems Example Configuration
Pinging 'www.embeddedx86.com' [209.130.84.83]
sent PING # 1 , PING receipt # 1 : response time 0.00 seconds
Ping Statistics
Sent : 1
Received : 1
Success : 100 %
Average RTT : 0.35 seconds
[A:\]

If you prefer to use a package other than WATTCP, go right ahead. Device-drivers for other operating systems and network protocols are available from both the Technologic Systems and Cirrus Logic web sites (see Appendix H below).

Real Time Clock

The Dallas Semiconductor DS12887 is used for the PC compatible battery-backed real-time clock. It is a completely self-contained module that includes a Motorola 146818 compatible clock chip, the 32.768 kHz crystal, the lithium battery, and 114 bytes of battery-backed CMOS RAM. It is guaranteed to maintain clock operation for a minimum of 10 years in the absence of power. It is located at the standard PC I/O addresses of Hex 070 and 071. The top 32 bytes (index 60h through 7Fh) are not used by the BIOS and are available for user applications.

Watchdog Timer

The Intel 386EX contains a 32-bit watchdog timer (WDT) unit that can be used in two different modes to effect a watchdog supervisory function. In either mode, a system reset is asserted when the WDT times out preventing a system �hanging� due to a software bug. To prevent a WDT timeout, the application must periodically �feed� the WDT by writing to specific I/O locations. The 32-bit downcounter allows timeout values as high as 160 seconds.

The general-purpose timer mode is more flexible in that the timeout values can be changed dynamically and the timer can be turned on and off under software control. The disadvantage of this mode is that it doesn�t provide 100% protection because a bug could turn off the timer during a crash and the system would hang.

The software secure watchdog mode utilizes a �lockout sequence� to set a WDTEN bit in the watchdog status register. Once this bit is set, only a system reset can clear this bit. When WDTEN is set, it is not possible to change the WDT timeout value or to turn off the WDT. This provides a high level of assurance against errant software causing a system to hang.

For details see the Intel 386EX User Manual.