TS-4100 FPGA: Difference between revisions
From embeddedTS Manuals
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| Line 9: | Line 9: | ||
! Description | ! Description | ||
|- | |- | ||
| rowspan= | | rowspan=2 | 0:128 | ||
| 7 | | 7 | ||
| GPIO mode | | GPIO mode | ||
|- | |- | ||
| 6:0 | |||
| Crossbar Value | |||
|- | |||
| rowspan=4 | 129:256 | |||
| 6:3 | | 6:3 | ||
| | | Reserved | ||
|- | |- | ||
| 2 | | 2 | ||
Revision as of 15:13, 22 February 2016
The TS-4100 FPGA registers are accessed over I2C. The /sys/class/gpio driver provides access to the IO using these registers. See the #GPIO section for more information on the recommended method for IO access.
The FPGA is available at I2C addresses 0x28-0x2f. First write the address which is 16-bits, followed by the data which is 8-bits.
| Address | Bits | Description |
|---|---|---|
| 0:128 | 7 | GPIO mode |
| 6:0 | Crossbar Value | |
| 129:256 | 6:3 | Reserved |
| 2 | Input Data | |
| 1 | Output Data | |
| 0 | Output Enable |