TS-4200: Difference between revisions
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|data9 = [http://www.embeddedarm.com/documentation/third-party/atmel_at91sam9g20_technical_rm_may2010.pdf CPU Technical Reference Manual] | |data9 = [http://www.embeddedarm.com/documentation/third-party/atmel_at91sam9g20_technical_rm_may2010.pdf CPU Technical Reference Manual] | ||
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== Syscon == | |||
{|class="wikitable" | |||
|- | |||
! Offset | |||
! Bits | |||
! Usage | |||
|- | |||
| 0x0 | |||
| 15:0 | |||
| Model ID: Reads 0x4200 | |||
|- | |||
| rowspan="5" | 0x2 | |||
| 15 | |||
| Green LED (1 = on) | |||
|- | |||
| 14 | |||
| Red LED (1 = on) | |||
|- | |||
| 13:8 | |||
| Reserved | |||
|- | |||
| 7:4 | |||
| Board Sub-model: reads 0x0 on standard unit | |||
|- | |||
| 3:0 | |||
| FPGA revision | |||
|- | |||
| 0x4 | |||
| 15:0 | |||
| DIO direction for DIO 15(MSB)-0(LSB) | |||
|- | |||
| 0x6 | |||
| 15:0 | |||
| DIO output data for DIO 15(MSB)-0(LSB) | |||
|- | |||
| 0x8 | |||
| 15:0 | |||
| DIO input data for DIO 15(MSB)-0(LSB) | |||
|- | |||
| rowspan="11" | 0xa | |||
| 15:12 | |||
| Reserved | |||
|- | |||
| 11 | |||
| UART0 9 bit mode (so that TX_EN works correctly) | |||
|- | |||
| 10 | |||
| 1 = use DIO12 for uart0 TX_EN instead of DIO | |||
|- | |||
| 9 | |||
| 1 = use 512Hz for WDT instead of 200Hz | |||
|- | |||
| 8 | |||
| 1 = auto reboot when DIO 9 is driven low (enable reset button) | |||
|- | |||
| 7:6 | |||
| Scratch Register (used by bootrom) | |||
|- | |||
| 5:4 | |||
| Mode strapping inputs Mode2 and Mode1 | |||
|- | |||
| 3 | |||
| Reserved | |||
|- | |||
| 2 | |||
| 1 = Enable power to Ethernet PHY | |||
|- | |||
| 1 | |||
| 1 = Enable power to SD card | |||
|- | |||
| 0 | |||
| Offboard reset signal (1 = reset) | |||
|- | |||
| 0xc | |||
| 15:0 | |||
| 32-bit 1MHz free running counter (16 LSBs) | |||
|- | |||
| 0xe | |||
| 15:0 | |||
| 32-bit 1MHz free running counter (16 MSBs) | |||
|- | |||
| 0x10 | |||
| 15:0 | |||
| Watchdog feed register | |||
|- | |||
| 0x12 | |||
| 15:0 | |||
| DIO direction for DIO 31(MSB) - 16(LSB) | |||
|- | |||
| 0x14 | |||
| 15:0 | |||
| DIO output data for DIO 31(MSB) - 16(LSB) | |||
|- | |||
| 0x16 | |||
| 15:0 | |||
| DIO input data for DIO 31(MSB) - 16(LSB) | |||
|- | |||
| 0x18 | |||
| 15:0 | |||
| Hardware RNG (16 LSB) | |||
|- | |||
| 0x1a | |||
| 15:0 | |||
| Hardware RNG (16 MSB) | |||
|- | |||
| rowspan="3" | 0x1c | |||
| 15 | |||
| Embedded FlashROM CLK | |||
|- | |||
| 14:8 | |||
| Embedded FlashROM Address | |||
|- | |||
| 7:0 | |||
| Embedded FlashROM Data Byte | |||
|- | |||
| 0x1e | |||
| 15:0 | |||
| UART0 baud rate divisor (for UART0 TX_EN) | |||
|- | |||
| 0x20 | |||
| 15:0 | |||
| MUXBUS configuration register | |||
|- | |||
| 0x22 | |||
| 15:0 | |||
| IRQ register | |||
|- | |||
| 0x24 | |||
| 15:0 | |||
| IRQ mask register | |||
|} | |||
Revision as of 23:44, 19 October 2011
 | |
| Released Mar. 2011 | |
| Product Page | |
| Documentation | |
|---|---|
| Schematic | |
| Mechanical Drawing | |
| FTP Path | |
| CPU Datasheet | |
| CPU Manual | |
| CPU Technical Reference Manual |
Syscon
| Offset | Bits | Usage |
|---|---|---|
| 0x0 | 15:0 | Model ID: Reads 0x4200 |
| 0x2 | 15 | Green LED (1 = on) |
| 14 | Red LED (1 = on) | |
| 13:8 | Reserved | |
| 7:4 | Board Sub-model: reads 0x0 on standard unit | |
| 3:0 | FPGA revision | |
| 0x4 | 15:0 | DIO direction for DIO 15(MSB)-0(LSB) |
| 0x6 | 15:0 | DIO output data for DIO 15(MSB)-0(LSB) |
| 0x8 | 15:0 | DIO input data for DIO 15(MSB)-0(LSB) |
| 0xa | 15:12 | Reserved |
| 11 | UART0 9 bit mode (so that TX_EN works correctly) | |
| 10 | 1 = use DIO12 for uart0 TX_EN instead of DIO | |
| 9 | 1 = use 512Hz for WDT instead of 200Hz | |
| 8 | 1 = auto reboot when DIO 9 is driven low (enable reset button) | |
| 7:6 | Scratch Register (used by bootrom) | |
| 5:4 | Mode strapping inputs Mode2 and Mode1 | |
| 3 | Reserved | |
| 2 | 1 = Enable power to Ethernet PHY | |
| 1 | 1 = Enable power to SD card | |
| 0 | Offboard reset signal (1 = reset) | |
| 0xc | 15:0 | 32-bit 1MHz free running counter (16 LSBs) |
| 0xe | 15:0 | 32-bit 1MHz free running counter (16 MSBs) |
| 0x10 | 15:0 | Watchdog feed register |
| 0x12 | 15:0 | DIO direction for DIO 31(MSB) - 16(LSB) |
| 0x14 | 15:0 | DIO output data for DIO 31(MSB) - 16(LSB) |
| 0x16 | 15:0 | DIO input data for DIO 31(MSB) - 16(LSB) |
| 0x18 | 15:0 | Hardware RNG (16 LSB) |
| 0x1a | 15:0 | Hardware RNG (16 MSB) |
| 0x1c | 15 | Embedded FlashROM CLK |
| 14:8 | Embedded FlashROM Address | |
| 7:0 | Embedded FlashROM Data Byte | |
| 0x1e | 15:0 | UART0 baud rate divisor (for UART0 TX_EN) |
| 0x20 | 15:0 | MUXBUS configuration register |
| 0x22 | 15:0 | IRQ register |
| 0x24 | 15:0 | IRQ mask register |