TS-4900 DIO: Difference between revisions
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The i.MX6 GPIO are available using the kernel's sysfs. See the kernel's documentation [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt here] for more detail. This interface provides a set of files and directories for interacting with GPIO | The i.MX6 GPIO are available using the kernel's sysfs. See the kernel's documentation [https://www.kernel.org/doc/Documentation/gpio/sysfs.txt here] for more detail. This interface provides a set of files and directories for interacting with GPIO. This allows GPIO to be accessed from any language that can write files. For example to toggle CN1_89/EIM_A22 the kernel maps this to GPIO 48. See the table below for the full IO listing. | ||
{{Note|It is possible to use GPIO registers as documented in the CPU reference manual to control GPIO. If this is needed keep in mind the kernel may attempt to access the same GPIO banks for various drivers. Be aware of the other IO in the same bank or use a read/modify/write.}} | |||
To interact with this pin, first export it to userspace: | To interact with this pin, first export it to userspace: | ||
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</source> | </source> | ||
As an output, the in can be written to 0 for low (GND), or 1 for high (3.3V). As an input the GPIO will have a 100k pullup. The GPIO pins | As an output, the in can be written to 0 for low (GND), or 1 for high (3.3V). As an input the GPIO will have a 100k pullup. The GPIO pins off of the i.MX6 processor support an absolute maximum of -0.5 to 3.6V. It possible to use any processor GPIO as an interrupt. This is done by writing the edge value, and using select() or poll() on the value file for changes. See the [[#Interrupts]] section for more details. | ||
Revision as of 10:34, 13 February 2017
The i.MX6 GPIO are available using the kernel's sysfs. See the kernel's documentation here for more detail. This interface provides a set of files and directories for interacting with GPIO. This allows GPIO to be accessed from any language that can write files. For example to toggle CN1_89/EIM_A22 the kernel maps this to GPIO 48. See the table below for the full IO listing.
| Note: | It is possible to use GPIO registers as documented in the CPU reference manual to control GPIO. If this is needed keep in mind the kernel may attempt to access the same GPIO banks for various drivers. Be aware of the other IO in the same bank or use a read/modify/write. |
To interact with this pin, first export it to userspace:
echo "48" > /sys/class/gpio/export
If you receive a permission denied on a pin that means it is claimed by another kernel driver. If it succeeds you will have a /sys/class/gpio/gpio48/ directory. The relevant files in this directory are:
direction - "out" or "in" value - write "1" or "0", or read "1" or "0" if direction is in edge - write with "rising", "falling", or "none"
# Set GPIO 48 high
echo "out" > /sys/class/gpio/gpio48/direction
echo "1" > /sys/class/gpio/gpio48/value
# Set GPIO 48 low
echo "0" > /sys/class/gpio/gpio48/value
# Read the value of GPIO 48
echo "in" > /sys/class/gpio/gpio48/direction
cat /sys/class/gpio/gpio48/value
As an output, the in can be written to 0 for low (GND), or 1 for high (3.3V). As an input the GPIO will have a 100k pullup. The GPIO pins off of the i.MX6 processor support an absolute maximum of -0.5 to 3.6V. It possible to use any processor GPIO as an interrupt. This is done by writing the edge value, and using select() or poll() on the value file for changes. See the #Interrupts section for more details.