TS-7180 COM Ports: Difference between revisions
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Custom populations may provide a fourth RS-232 uart on P5, at the cost of one of the CAN controllers. Pin-outs are shown in the table below. | |||
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The HD1 header contains TTL-level TX/RX pins that may be used to connect to a CPU UART, with the caveat that to do so, one of the assigned UARTs must be reassigned to the header. The reassignment is done by writing to the register at address 308 in the FPGA. The table in the [[#FPGA_Registers|FPGA Registers section]] shows which UARTS may be used. By default, the HD1 TX/RX pins are not connected to any UART. | The [[#Daughter_Card_Interface|daughter-card interface]] (HD1 header) contains TTL-level TX/RX pins that may be used to connect to a CPU UART, with the caveat that to do so, one of the assigned UARTs must be reassigned to the header. The reassignment is done by writing to the register at address 308 in the FPGA. The table in the [[#FPGA_Registers|FPGA Registers section]] shows which UARTS may be used. By default, the HD1 TX/RX pins are not connected to any UART. | ||
Revision as of 12:22, 26 December 2018
The TS-7180 provides three standard RS-232 COM ports, and one RS-485 COM port. The latter has auto-transmit-enable. All of these ports are presented on the P5 connector. The RS-485 port has an on-board terminator that may be enabled by installing the "485" jumper.
| UART | TX | RX |
|---|---|---|
| ttymxc1 | P5-5 | P5-6 |
| ttymxc4 | P5-2 | P5-3 |
| ttymxc6 | P5-7 | P5-8 |
| UART | 485+ | 485- |
|---|---|---|
| ttymxc3 | P5-13 | P5-14 |
| Note: | The RS-232 transceiver chip on the board must be enabled before the COM ports can be used. This is done by running the command "tshwctl -a 21 -w 3" |
Custom populations may provide a fourth RS-232 uart on P5, at the cost of one of the CAN controllers. Pin-outs are shown in the table below.
| UART | TX | RX |
|---|---|---|
| ttymxc6 | P5-10 | P5-11 |
The daughter-card interface (HD1 header) contains TTL-level TX/RX pins that may be used to connect to a CPU UART, with the caveat that to do so, one of the assigned UARTs must be reassigned to the header. The reassignment is done by writing to the register at address 308 in the FPGA. The table in the FPGA Registers section shows which UARTS may be used. By default, the HD1 TX/RX pins are not connected to any UART.