TS-7180 Daughter Card Interface: Difference between revisions
From embeddedTS Manuals
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The TS-7180 Daughter Card Interface may be used to connect a variety of off-board peripherals. | The TS-7180 Daughter Card Interface (HD8) may be used to connect a variety of off-board peripherals. | ||
{| | |||
! Signals | |||
! Pin Layout | |||
|- | |||
| | |||
{| class=wikitable | {| class=wikitable | ||
! Pin | |+ HD8 | ||
! | ! Pin | ||
! Description | |||
|- | |- | ||
| 1 | | 1 | ||
| | | VIN | ||
|- | |- | ||
| 2 | | 2 | ||
| POE_78 | | POE_78 <ref name=poepin>The POE pins can be used with a daughtercard to add POE support to the TS-7180.</ref> | ||
|- | |- | ||
| 3 | | 3 | ||
Line 23: | Line 20: | ||
|- | |- | ||
| 4 | | 4 | ||
| POE_45 | | POE_45 <ref name=poepin /> | ||
|- | |- | ||
| 5 | | 5 | ||
Line 29: | Line 26: | ||
|- | |- | ||
| 6 | | 6 | ||
| POE_TX | | POE_TX <ref name=poepin /> | ||
|- | |- | ||
| 7 | | 7 | ||
| | | HD1_SPI_CS <ref>This is a 5V tolerant input that can be read through gpio bank 2 io 10. As an output this is connected to gpio bank 2 io 0. The output by default is connected to <code>/dev/spidev2.1</code>. See the [[#SPI]] section for more details.</ref> | ||
|- | |- | ||
| 8 | | 8 | ||
| POE_RX | | POE_RX <ref name=poepin /> | ||
| | |} | ||
| | |||
[[File:TS-7180-V3-HD8 Header.svg|250px]] | |||
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|} | |} | ||
<References /> |
Latest revision as of 11:32, 11 May 2023
The TS-7180 Daughter Card Interface (HD8) may be used to connect a variety of off-board peripherals.
Signals | Pin Layout | ||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
- ↑ 1.0 1.1 1.2 1.3 The POE pins can be used with a daughtercard to add POE support to the TS-7180.
- ↑ This is a 5V tolerant input that can be read through gpio bank 2 io 10. As an output this is connected to gpio bank 2 io 0. The output by default is connected to
/dev/spidev2.1
. See the #SPI section for more details.