TS-7180 HD12: Difference between revisions

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(Created page with "{| class=wikitable |+ HD12 ! Pin ! Description |- | 1 | /dev/i2c-4 DAT |- | 2 | RXD_HD1_5V <ref>This is a 5V tolerant TTL UART input.</ref> <ref name=hd12uart>By defa...")
 
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| [[#SPI|SPI_3_CLK (/dev/spidev 2.1)]]
| [[#SPI|SPI_3_CLK (/dev/spidev 2.1)]]
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[[File:TS-7180-V3-HD12 Header.svg|250px]]
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Revision as of 11:27, 15 June 2021

Signals Pin Layout
HD12
Pin Description
1 /dev/i2c-4 DAT
2 RXD_HD1_5V [1] [2]
3 USB-
4 TXD_HD1_3V [2]
5 USB+
6 /dev/i2c-4 CLK
7 +5V
8 +5V
9 SPI_3_MISO (/dev/spidev 2.1)
10 SPI_3_MOSI (/dev/spidev 2.1)
11 3.3V
20 SPI_3_CLK (/dev/spidev 2.1)

TS-7180-V3-HD12 Header.svg

  1. This is a 5V tolerant TTL UART input.
  2. 2.0 2.1 By default, no uart is mapped here. These are remapped through [[#FPGA Registers|fpga reg 308]. For example, to remap UART8(ttymxc7) run "tshwctl --addr 308 --poke 5"