TS-7250-V3 ADC Header: Difference between revisions

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The ADC header supports 5 channels of 0-30VDC ADC.  Of these 5, 3 channels support sampling 0-20mA current loops.  These channels are sampled from /sys/devices/platform/soc/2100000.aips-bus/2198000.adc/iio:device0#/.
The ADC header supports 5 channels of 0-30VDC ADC.  Of these 5, 3 channels support sampling 0-20mA current loops.  These channels are sampled from /sys/devices/platform/soc/2100000.aips-bus/2198000.adc/iio:device0#/. See the [[#ADC|ADC section]] for more details on sampling these pins.
 
For example:
<source lang=bash>
# Disable current loops:
 
 
</source>


{|  
{|  
Line 20: Line 13:
|-
|-
| 1
| 1
| GPIO1_IO00/ADC?
| ii0:device0/voltage0
|-
|-
| 2
| 2
Line 26: Line 19:
|-
|-
| 3
| 3
| GPIO1_IO01/ADC?
| ii0:device0/voltage1
|-
|-
| 4
| 4
Line 32: Line 25:
|-
|-
| 5
| 5
| GPIO1_IO05/ADC?
| ii0:device0/voltage5
|-
|-
| 6
| 6
Line 38: Line 31:
|-
|-
| 7
| 7
| GPIO1_IO08/ADC?
| ii0:device0/voltage8
|-
|-
| 8
| 8
Line 44: Line 37:
|-
|-
| 9
| 9
| GPIO1_IO09/ADC?
| ii0:device0/voltage9
|-
|-
| 10
| 10

Revision as of 15:18, 6 July 2021

The ADC header supports 5 channels of 0-30VDC ADC. Of these 5, 3 channels support sampling 0-20mA current loops. These channels are sampled from /sys/devices/platform/soc/2100000.aips-bus/2198000.adc/iio:device0#/. See the ADC section for more details on sampling these pins.

Signals Pin Layout
Pin Signal
1 ii0:device0/voltage0
2 GND
3 ii0:device0/voltage1
4 GND
5 ii0:device0/voltage5
6 GND
7 ii0:device0/voltage8
8 GND
9 ii0:device0/voltage9
10 GND

TS-7250-V3-ADC.svg

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