TS-7250-V3 ADC Header: Difference between revisions

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The ADC header supports 5 channels of 0-30VDC ADC.  Of these 5, 3 channels support sampling 0-20mA current loops.  These channels are sampled from /sys/devices/platform/soc/2100000.aips-bus/2198000.adc/iio:device0#/See the [[#ADC|ADC section]] for more details on sampling these pins.
The ADC header supports 5 channels of 0-30VDC ADC.  Of these 5, 3 channels support sampling 0-20mA current loops.  These channels are sampled from:
<source lang=bash>
cat /sys/bus/iio/devices/iio\:device1/in_voltage{0,1,5,8,9}_raw
</source>
See the [[#ADC|ADC section]] for more details on sampling these pins.


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Revision as of 13:45, 15 November 2021

The ADC header supports 5 channels of 0-30VDC ADC. Of these 5, 3 channels support sampling 0-20mA current loops. These channels are sampled from:

cat /sys/bus/iio/devices/iio\:device1/in_voltage{0,1,5,8,9}_raw

See the ADC section for more details on sampling these pins.

Signals Pin Layout
Pin Signal
1 iio:device0/voltage0
2 GND
3 iio:device0/voltage1
4 GND
5 iio:device0/voltage5
6 GND
7 iio:device0/voltage8
8 GND
9 iio:device0/voltage9
10 GND

TS-7250-V3-ADC.svg