TS-7250-V3 ADC Header

From embeddedTS Manuals
Revision as of 09:52, 4 December 2019 by Mark (talk | contribs) (Created page with "The ADC header supports 5 channels of 0-30VDC ADC. Of these 5, 3 channels support sampling 0-20mA current loops. These channels are sampled from /sys/devices/platform/soc/21...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

The ADC header supports 5 channels of 0-30VDC ADC. Of these 5, 3 channels support sampling 0-20mA current loops. These channels are sampled from /sys/devices/platform/soc/2100000.aips-bus/2198000.adc/iio:device0#/.

For example: 

# Disable current loops:
Signals Pin Layout
Pin Signal
1 GPIO1_IO00/ADC?
2 GND
3 GPIO1_IO01/ADC?
4 GND
5 GPIO1_IO05/ADC?
6 GND
7 GPIO1_IO08/ADC?
8 GND
9 GPIO1_IO09/ADC?
10 GND

File:TS-7250-V3-ADC.png

Retrieved from "http://docs.embeddedTS.com/index.php?title=TS-7250-V3_ADC_Header&oldid=11110"