TS-7250-V3 DIO Header

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The DIO header is a 0.1" pitch 2x8 header including SPI and GPIO. All pins on this header are 5V tolerant except SPI output pins.

Signals Pin Layout
Pin Signal
1 GPIO Bank 5 IO 1
2 GND
3 GPIO Bank 5 IO 2
4 Current Sink Output Bank 2 IO 27 [1]
5 GPIO Bank 5 IO 3
6 spidev 0.1 Chip Select
7 GPIO Bank 5 IO 4
8 GPIO Bank 5 IO 5
9 GPIO Bank 5 IO 6
10 spidev 0.1 MISO
11 GPIO Bank 5 IO 7
12 spidev 0.1 MOSI
13 GPIO Bank 5 IO 8
14 spidev 0.1 CLK
15 GPIO Bank 5 IO 9
16 3.3V

TS-7250-V3-DIO Header.svg

  1. When this pin is a high output it enables a FET to ground.