TS-7250-V3 FPGA PWM
From embeddedTS Manuals
The TS-7250-V3 includes a PWM core that supports 10-bit duty/period, a 79.2mhz input clock, and 12 values of input clock shift.
Linux supports this API through the /sys/ interface using file I/O. First export the pwm channel to enable it:
# Export PWM channel 0
echo 0 > /sys/class/pwm/pwmchip0/export
| File | Description |
|---|---|
| /sys/class/pwm/pwmchip0/pwm0/period | Period in nanoseconds. Must be bigger than the duty cycle or writes will fail. Can only change when the pwm is disabled. |
| /sys/class/pwm/pwmchip0/pwm0/duty_cycle | Duty cycle in nanoseconds. Can change at any time, must be less than period. |
| /sys/class/pwm/pwmchip0/pwm0/enable | When 1, pwm is outputting. When 0, outputs idle state of the PWM. |
| /sys/class/pwm/pwmchip0/pwm0/polarity | When "normal", idle high and duty cycle low. When "inversed", idle low and duty cycle high. |
For example, for a 50hz signal with 25% duty cycle:
# Set Period to 20ms
echo 20000000 > /sys/class/pwm/pwmchip0/pwm0/period
# Set duty cycle to 5ms
echo 5000000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle
# Enable PWM and output 50hz signal
echo 1 > /sys/class/pwm/pwmchip0/pwm0/enable
# Duty cycle can be changed while it is enabled
echo 1000000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle
The Linux PWM API will attempt to arrive at the exact period at the cost of the duty cycle resolution. For the most expressive duty cycle, use one of the max period ns values from the table below.
| Divisor | PWM Input Frequency (hz) | Max Period (ns) | Max Period (hz) |
|---|---|---|---|
| 0 | 79200000 | 12917 | 77419 |
| 1 | 3960000 | 25833 | 38710 |
| 2 | 1980000 | 51667 | 19355 |
| 3 | 990000 | 103333 | 9677 |
| 4 | 495000 | 206667 | 4839 |
| 5 | 247500 | 413333 | 2419 |
| 6 | 123750 | 826667 | 1210 |
| 7 | 61875 | 1653333 | 605 |
| 8 | 30937 | 3306667 | 302 |
| 9 | 15468 | 6613333 | 151 |
| 10 | 7734.38 | 13226795 | 76 |
| 11 | 3867 | 26453932 | 38 |
If period is set to one of these values, the full 10 bits of duty cycle is available. Past that, the Linux API will use the closest available value.
This core is located at 0x500001a8.
| Offset | Bits | Description |
|---|---|---|
| 0x0 | 15:2 | Reserved |
| 1 | Inversed (0 = idle high, duty cycle low), (1 = idle low, duty cycle high) | |
| 0 | Enabled | |
| 0x2 | 15:10 | Reserved |
| 9:0 | Period | |
| 0x4 | 15:10 | Reserved |
| 9:0 | Duty Cycle | |
| 0x6 | 15:10 | Reserved |
| 4:0 | shift (Clock frequency = 79200000 / (1 >> shift)) |