TS-7250-V3 IO Ranges: Difference between revisions

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Tag: Reverted
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| 6mA
| 6mA
| 6mA
| 6mA
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| FPGA ADC
| 6V
| 6.3V
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Revision as of 16:04, 22 September 2023

IO Type Voltage max Absolute max Source Current Sink Current VIL VIH
CPU 3.3V
CPU 3.3V+QS3861 5V 7V 6mA 6mA
FPGA 3.3-V LVTTL 3.3V 3.6V 6mA 6mA
FPGA 3.3-V LVTTL+QS3861 5V 7V 6mA 6mA
FPGA ADC 6V 6.3V
PCA9555 5.3V 6V 25mA [1] 8-24mA 0.3V 2.31V
  1. "Each I/O must be externally limited to a maximum of 25 mA and each octal (IO0_0 to IO0_7 and IO1_0 to IO1_7) must be limited to a maximum current of 100 mA for a device total of 200 mA. The total current sourced by all I/Os must be limited to 160 mA