TS-7250-V3 MikroBus Header: Difference between revisions

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[[File:TS-7250-V3-Mikrobus Header.svg|302px]]
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The /dev/spidev* devices can be accessed from Linux.  See the [https://www.kernel.org/doc/Documentation/spi/spidev kernel spidev documentation] for more information on interfacing with the SPI peripherals from C.
Other languages also have bindings to interface with spidev:
* [https://github.com/rust-embedded/rust-spidev rust]
* [https://pypi.org/project/spidev/ python]
* [https://www.npmjs.com/package/spi-device npm/js]


<References />
<References />

Revision as of 09:42, 6 October 2021

The Mikrobus header is a 0.1" pitch 2x8 header which supports the Mikroe Click board ecosystem. This header features 3.3V, 5V, SPI, GPIO, ADC, PWM, a UART, and PWM. All IO are 3.3V tolerant.

By default all of these headers default to their non-gpio functions. These can be changed in the FPGA syscon register 0x08. For example: 

# Make all mikrobus header pins GPIO:
peekpoke 32 0x50004008 0xF0

# Set only SPI to GPIO:
peekpoke 32 0x50004008 0x10
Signals Pin Layout
Pin Signal
1 #FPGA_ADC / GPIO Bank 7 IO 1 [1]
2 (MIKRO_RESET#) GPIO Bank 7 IO 0 [2]
3 spidev 5.0 CS# / GPIO Bank 7 IO 5
4 spidev 5.0 CLK / GPIO Bank 7 IO 6
5 spidev 5.0 MISO / GPIO Bank 7 IO 7
6 spidev 5.0 MOSI / GPIO Bank 7 IO 8
7 3.3V
8 GND
9 GND
10 5V
11 /dev/i2c-2 DAT / GPIO Bank 7 IO 11
12 /dev/i2c-2 CLK / GPIO Bank 7 IO 12
13 ttymxc6 TXD / GPIO Bank 7 IO 9
14 ttymxc6 RXD / GPIO Bank 7 IO 10
15 FPGA IRQ 18 / GPIO Bank 7 IO 2
16 MIKRO_PWM / GPIO Bank 7 IO 4

TS-7250-V3-Mikrobus Header.svg

The /dev/spidev* devices can be accessed from Linux. See the kernel spidev documentation for more information on interfacing with the SPI peripherals from C.

Other languages also have bindings to interface with spidev:

  1. ↑ This signal does not require a mux to use as a GPIO or ADC. To use the ADC signal the GPIO should be an input which is the reset default.
  2. ↑ This signal is pulled high, but your specific click card may require a specific reset duration.
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