TS-7250-V3 MikroBus Header: Difference between revisions
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| [[#FPGA_ADC]] / [[#GPIO|GPIO | | [[#FPGA_ADC]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 1]] <ref>This signal does not require a mux to use as a GPIO or ADC. To use the ADC signal the GPIO should be an input which is the reset default.</ref> | ||
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| 2 | | 2 | ||
| (MIKRO_RESET#) [[#GPIO|GPIO | | (MIKRO_RESET#) [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 0]] <ref>This signal is pulled high, but your specific click card may require a specific reset duration.</ref> | ||
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| 3 | | 3 | ||
| [[#FPGA_SPI|spidev 5.0 CS#]] / [[#GPIO|GPIO | | [[#FPGA_SPI|spidev 5.0 CS#]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 5]] | ||
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| 4 | | 4 | ||
| [[#FPGA_SPI|spidev 5.0 CLK]] / [[#GPIO|GPIO | | [[#FPGA_SPI|spidev 5.0 CLK]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 6]] | ||
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| 5 | | 5 | ||
| [[#FPGA_SPI|spidev 5.0 MISO]] / [[#GPIO|GPIO | | [[#FPGA_SPI|spidev 5.0 MISO]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 7]] | ||
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| 6 | | 6 | ||
| [[#FPGA_SPI|spidev 5.0 MOSI]] / [[#GPIO|GPIO | | [[#FPGA_SPI|spidev 5.0 MOSI]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 8]] | ||
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| 7 | | 7 | ||
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| 11 | | 11 | ||
| [[#I2C|/dev/i2c-4 DAT]] / [[#GPIO|GPIO | | [[#I2C|/dev/i2c-4 DAT]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 11]] | ||
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| 12 | | 12 | ||
| [[#I2C|/dev/i2c-4 CLK]] / [[#GPIO|GPIO | | [[#I2C|/dev/i2c-4 CLK]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 12]] | ||
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| 13 | | 13 | ||
| [[#UARTs|ttyS13 TXD]] / [[#GPIO|GPIO | | [[#UARTs|ttyS13 TXD]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 9]] | ||
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| 14 | | 14 | ||
| [[#UARTs|ttyS13 RXD]] / [[#GPIO|GPIO | | [[#UARTs|ttyS13 RXD]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 10]] | ||
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| 15 | | 15 | ||
| [[#FPGA IRQs|FPGA IRQ 18]] / [[#GPIO|GPIO | | [[#FPGA IRQs|FPGA IRQ 18]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 2]] | ||
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| 16 | | 16 | ||
| [[#FPGA PWM|MIKRO_PWM]] / [[#GPIO|GPIO | | [[#FPGA PWM|MIKRO_PWM]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 4]] | ||
|} | |} | ||
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Revision as of 10:14, 9 April 2024
The Mikrobus header is a 0.1" pitch 2x8 header which supports the Mikroe Click board ecosystem. This header features 3.3 V, 5 V, SPI, GPIO, ADC, PWM, a UART, and PWM. All I/O on this header are FPGA 3.3-V LVTTL.
The Click boards™ standard (where Click boards™ are a modular prototyping add-on board) is openly documented, allowing for custom boards to be designed.
By default all of these headers default to their non-gpio functions. These can be changed in the FPGA syscon register 0x08. For example:
# Make all mikrobus header pins GPIO:
peekpoke 32 0x50004008 0xF0
# Set only SPI to GPIO:
peekpoke 32 0x50004008 0x10
Signals | Pin Layout |
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