TS-7250-V3 MikroBus Header: Difference between revisions

From embeddedTS Manuals
No edit summary
No edit summary
 
(9 intermediate revisions by 3 users not shown)
Line 1: Line 1:
The Mikrobus header is a 0.1" pitch 2x8 header which supports [https://www.mikroe.com/click the Mikroe Click board ecosystem].  This header features 3.3V, 5V, SPI, GPIO, ADC, PWM, a UART, and PWM. All IO are 3.3V tolerant.
The Mikrobus header is a 0.1" pitch 2x8 header which supports [https://www.mikroe.com/click the Mikroe Click board ecosystem].  This header features 3.3 V, 5 V, SPI, GPIO, ADC, PWM, a UART, and PWM. All I/O on this header are [[#IO specifications|FPGA 3.3-V LVTTL]].
 
The Click boards™ standard (where Click boards™ are a modular prototyping add-on board) is openly documented, [https://cdn.mikroe.com/cms/click-boards/click-board-standard-guidelines-april-2019.pdf allowing for custom boards to be designed].


By default all of these headers default to their non-gpio functions.  These can be changed in the [[#FPGA Syscon|FPGA syscon register 0x08]].  For example:
By default all of these headers default to their non-gpio functions.  These can be changed in the [[#FPGA Syscon|FPGA syscon register 0x08]].  For example:
Line 18: Line 20:
|-
|-
! Pin
! Pin
! Signal
! Name
! Description
|-
|-
| 1
| 1
| [[#FPGA_ADC]] / [[#GPIO|GPIO Bank 7 IO 1]] <ref>This signal does not require a mux to use as a GPIO or ADC.  To use the ADC signal the GPIO should be an input which is the reset default.</ref>
| AN
| [[#FPGA_ADC]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 1]] <ref>This signal does not require a mux to use as a GPIO or ADC.  To use the ADC signal the GPIO should be an input which is the reset default.</ref>
|-
|-
| 2
| 2
| (MIKRO_RESET#) [[#GPIO|GPIO Bank 7 IO 0]] <ref>This signal is pulled high, but your specific click card may require a specific reset duration.</ref>
| RST
| [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 0]] <ref>This signal is pulled high, but your specific click card may require a specific reset duration.</ref>
|-
|-
| 3
| 3
| [[#FPGA_SPI|spidev 5.0 CS#]] / [[#GPIO|GPIO Bank 7 IO 5]]
| CS
| [[#FPGA_SPI|spidev 5.0 CS#]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 5]]
|-
|-
| 4
| 4
| [[#FPGA_SPI|spidev 5.0 CLK]] / [[#GPIO|GPIO Bank 7 IO 6]]
| SCK
| [[#FPGA_SPI|spidev 5.0 CLK]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 6]]
|-
|-
| 5
| 5
| [[#FPGA_SPI|spidev 5.0 MISO]] / [[#GPIO|GPIO Bank 7 IO 7]]
| MISO
| [[#FPGA_SPI|spidev 5.0 MISO]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 7]]
|-
|-
| 6
| 6
| [[#FPGA_SPI|spidev 5.0 MOSI]] / [[#GPIO|GPIO Bank 7 IO 8]]
| MOSI
| [[#FPGA_SPI|spidev 5.0 MOSI]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 8]]
|-
|-
| 7
| 7
| +3.3V
| [[#Board Rails|3.3V]]
| [[#Board Rails|3.3V]]
|-
|-
| 8
| 8
| GND
| GND
| GND
|-
|-
| 9
| 9
| GND
| GND
| GND
|-
|-
| 10
| 10
| +5V
| [[#Board Rails|5V]]
| [[#Board Rails|5V]]
|-
|-
| 11
| 11
| [[#I2C|/dev/i2c-2 DAT]] / [[#GPIO|GPIO Bank 7 IO 11]]
| SDA
| [[#I2C|/dev/i2c-4 DAT]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 11]]
|-
|-
| 12
| 12
| [[#I2C|/dev/i2c-2 CLK]] / [[#GPIO|GPIO Bank 7 IO 12]]
| SCL
| [[#I2C|/dev/i2c-4 CLK]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 12]]
|-
|-
| 13
| 13
| [[#UARTs|ttymxc6 TXD]] / [[#GPIO|GPIO Bank 7 IO 9]]
| TX
| [[#UARTs|ttyS13 TXD]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 9]]
|-
|-
| 14
| 14
| [[#UARTs|ttymxc6 RXD]] / [[#GPIO|GPIO Bank 7 IO 10]]
| RX
| [[#UARTs|ttyS13 RXD]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 10]]
|-
|-
| 15
| 15
| [[#FPGA IRQs|FPGA IRQ 18]] / [[#GPIO|GPIO Bank 7 IO 2]]
| INT
| [[#FPGA IRQs|FPGA IRQ 18]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 2]]
|-
|-
| 16
| 16
| [[#FPGA PWM|MIKRO_PWM]] / [[#GPIO|GPIO Bank 7 IO 4]]
| PWM
| [[#FPGA PWM|MIKRO_PWM]] / [[#GPIO|GPIO Chip 50004054.fpga_gpio IO 4]]
|}
|}
|  
|  
[[File:TS-7250-V3-Mikrobus Header.svg|302px]]
[[File:TS-7250-V3-Mikrobus Header.svg|302px]]
|}
|}
The /dev/spidev* devices can be accessed from Linux.  See the [https://www.kernel.org/doc/Documentation/spi/spidev kernel spidev documentation] for more information on interfacing with the SPI peripherals from C.
Other languages also have bindings to interface with spidev:
* [https://github.com/rust-embedded/rust-spidev rust]
* [https://pypi.org/project/spidev/ python]
* [https://www.npmjs.com/package/spi-device npm/js]


<References />
<References />

Latest revision as of 10:16, 9 April 2024

The Mikrobus header is a 0.1" pitch 2x8 header which supports the Mikroe Click board ecosystem. This header features 3.3 V, 5 V, SPI, GPIO, ADC, PWM, a UART, and PWM. All I/O on this header are FPGA 3.3-V LVTTL.

The Click boards™ standard (where Click boards™ are a modular prototyping add-on board) is openly documented, allowing for custom boards to be designed.

By default all of these headers default to their non-gpio functions. These can be changed in the FPGA syscon register 0x08. For example: 

# Make all mikrobus header pins GPIO:
peekpoke 32 0x50004008 0xF0

# Set only SPI to GPIO:
peekpoke 32 0x50004008 0x10
Signals Pin Layout
Pin Name Description
1 AN #FPGA_ADC / GPIO Chip 50004054.fpga_gpio IO 1 [1]
2 RST GPIO Chip 50004054.fpga_gpio IO 0 [2]
3 CS spidev 5.0 CS# / GPIO Chip 50004054.fpga_gpio IO 5
4 SCK spidev 5.0 CLK / GPIO Chip 50004054.fpga_gpio IO 6
5 MISO spidev 5.0 MISO / GPIO Chip 50004054.fpga_gpio IO 7
6 MOSI spidev 5.0 MOSI / GPIO Chip 50004054.fpga_gpio IO 8
7 +3.3V 3.3V
8 GND GND
9 GND GND
10 +5V 5V
11 SDA /dev/i2c-4 DAT / GPIO Chip 50004054.fpga_gpio IO 11
12 SCL /dev/i2c-4 CLK / GPIO Chip 50004054.fpga_gpio IO 12
13 TX ttyS13 TXD / GPIO Chip 50004054.fpga_gpio IO 9
14 RX ttyS13 RXD / GPIO Chip 50004054.fpga_gpio IO 10
15 INT FPGA IRQ 18 / GPIO Chip 50004054.fpga_gpio IO 2
16 PWM MIKRO_PWM / GPIO Chip 50004054.fpga_gpio IO 4

TS-7250-V3-Mikrobus Header.svg

  1. ↑ This signal does not require a mux to use as a GPIO or ADC. To use the ADC signal the GPIO should be an input which is the reset default.
  2. ↑ This signal is pulled high, but your specific click card may require a specific reset duration.
Retrieved from "http://docs.embeddedTS.com/index.php?title=TS-7250-V3_MikroBus_Header&oldid=16524"