TS-7250-V3 PC104 Bus Timing: Difference between revisions
From embeddedTS Manuals
No edit summary |
No edit summary |
||
| Line 1: | Line 1: | ||
The TS-7250-V3 PC104 cycles are approximately 1us per access, on either 8 or 16-bit. The timing is not user configurable, but is known to work with most typical ISA compatible devices such as a 16550, SJA1000, and more. | The TS-7250-V3 PC104 cycles are approximately 1us per access in total, on either 8 or 16-bit. The timing is not user configurable, but is known to work with most typical ISA compatible devices such as a 16550, SJA1000, and more. | ||
{| | {| | ||
Revision as of 11:42, 9 July 2021
The TS-7250-V3 PC104 cycles are approximately 1us per access in total, on either 8 or 16-bit. The timing is not user configurable, but is known to work with most typical ISA compatible devices such as a 16550, SJA1000, and more.
|
|