TS-7553: Difference between revisions

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|data1      = Released Mar. 2010
|data1      = Released Mar. 2010
|header2      = Documentation
|header2      = Documentation
|data3        = [http://www.embeddedarm.com/documentation/ts-7553-schematic.pdf Schematic]
|data3        = [http://www.embeddedarm.com/documentation/ts-9445-schematic.pdf Schematic]  
|data4        = [http://www.embeddedarm.com/documentation/ts-7553-mechanical.pdf Mechanical Drawing]
|data5        = [ftp://ftp.embeddedarm.com/ts-arm-sbc/ts-7553-linux/ FTP Path]
}}
}}



Revision as of 23:21, 6 June 2011

TS-7553
TS-7553.jpg
Released Mar. 2010
Documentation
Schematic


Overview

The TS-7553 was released Mar. 2010 and is a smaller form factor and cost reduced version of the TS-7552 without the extra USB ports and 8-28V switching power supply. It was designed to be mated with an inexpensive plastic enclosure and serve as a standalone general purpose embedded server.

Features

  • 250Mhz Cavium ARM9 CPU core (Faraday 526)
  • 64MByte 16-bit wide DDR SDRAM running at 125Mhz
  • 2 USB 2.0 High speed (480 Mb/s) Host ports
  • 1 USB 2.0 slave port
  • 1 TTL serial console port (16550) on CPU
  • Hardware watchdog on FPGA
  • Optional battery backed real time clock
  • 10/100 Mbit on-CPU ethernet
  • Low power (TS-7500 is 395mA @ 5V or 2.0 Watt)
  • Fanless/heatsink-less operation up to 80C temperatures
  • Customizable FPGA opencore (with Verilog sources)
  • High speed SPI and I2C interfaces
  • Standard CAN controller on DB9 connector
  • Standard RS485 XUART serial port on DB9
  • 2 RS232 XUART serial ports on DB9
  • Optional onboard 802.11bg radio
  • Onboard microSD socket
  • 256Mbyte onboard XNAND Drive preloaded with Debian Linux
  • 12 3.3V CPU/FPGA controlled GPIOs
  • Designed to fit in a low cost plastic enclosure

Optional Features/Accessories

  • CB-USB-AMBM: USB Cable w/ connectors USB-A Male to USB-B Male (can also used as power supply cable)
  • CB-USB-AMAF: USB Cable w/ connectors USB-A Male to USB-A Female
  • CB7-05: Null modem cable with a DB9F at each end
  • RC-DB9: 10-pin header COM port adapter cable to DB-9
  • TS-9448: Console Mini-Peripheral Board w/ 1 RC-DB9 cable
  • WIFI-G-USB: USB 802.11g wireless network interface
  • PS-5VDC-1AMP: 5VDC 1AMP Power Supply (100-240V)
  • TS-ENC820: Plastic Enclosure

Getting Started

Get a console

If you have a TS-9448, you can connect that to the 26 pin header and use the DB9 port which will by default be the console port. If you do not have a 9448, you can hold the reset button for 5 seconds (until the red led lights up) and let go to switch the console port to the onboard COM port using the standard 8n1, no flow control, 115200 baud rate.

You can also telnet to the board with the default network configuration, though this will omit the TS-BOOTROM messages.

Busybox

After the board is first booted you will be at this shell:

Finished booting in 2.65 seconds
Type 'tshelp' for help
#

See the Busybox page on configuring the default boot options, including skipping Busybox. To boot into the full debian environment now, type 'exit' at the console.

Boot Process

This board uses the TS-BOOTROM to load the OS. The SD Boot jumper, as well as the TS-9448 will decide where the system boots.

Boot Selection With TS-9448

Switch Pos. SDBOOT Jumper Boot Behavior
Down Off XNAND
None On Offboard SPI Flash
Up Off MicroSD
 Note: JP1 will cause the bootloader to only boot to SPI Flash

Boot Selection Without TS-9448

SDBOOT Jumper Boot Behavior
Off XNAND
On MicroSD

Userspace Utilities

ts7500ctl

xuartctl

26 Pin Header

TS-7552/TS-7553 also includes a .1" pin spacing external header for board to board interfacing. The external interfaces uses a total of 26 pins.

Diagram

   ______________________________________ 
  | 2  4  6  8 10 12 14 16 18 20 22 24 26|
* | 1  3  5  7  9 11 13 15 17 19 21 23 25|
  \--------------------------------------/

Pinout

Pin # Name Function
1 JTAG_DOUT
2 JTAG_TMS 4.7k pull-up
3 GND Ground
4 JTAG_DIN 4.7k pull-up
5 MODE2 Latched boot up mode 2, 4.7k pull-up
6 JTAG_CLK 2.2k pull-up
7 CONSOLE_TXD Console TX, latched boot up mode 1, 4.7k pull-up
8 CONSOLE_RXD Console RX, 4.7k pull-up
9 SPI_MISO SPI master-in slave-out
10 3.3V 3.3V power
11 SPI_CS1 SPICS#1 output
12 SPI_MOSI SPI master-out slave-in
13 SDA I2C/DIO-driven by CPU, 2.2k pull-up
14 DIO_14 SPI clock output
15 SCL I2C/DIO-driven by CPU, 2.2k pull-up
16 WD_RESET Watchdog or system reset output
17 DIO_17 DIO,SPICS#0 output, weak FPGA pull-up
18 DIO_18 DIO,SPICS#2 output, weak FPGA pull-up
19 DIO_19 DIO, SPICS#3 output, weak FPGA pull-up, XUART#4 TX
20 DIO_20 DIO, weak FPGA pull-up, XUART#4 RX
21 DIO_21 DIO, weak FPGA pull-up, XUART#5 TX
22 DIO_22 DIO, weak FPGA pull-up, XUART#5 RX
23 DIO_23 DIO, weak FPGA pull-up, XUART#6 TX
24 DIO_24 DIO, weak FPGA pull-up, XUART#6 RX
25 DIO_25 DIO, weak FPGA pull-up, XUART#7 TX
26 DIO_26 DIO, weak FPGA pull-up, XUART#7; RX +5V
Note: As of Rev.A1 of TS-7553, Pin 26 (DIO_26) will permanently 
be +5V instead of "DIO, weak FPGA pull-up".

None of the DIO pins are 5V tolerant. They are 3.3V LVCMOS I/O buffers with approximately 12mA current drive capability.

DB9 Connector

Diagram

 =============  
 \\1 2 3 4 5// 
  \\6 7 8 9//  
   =========    

Pinout

Pin # Name Function
1 RS485_0+ RS485 serial TX/RX + (XUART #2)
2 XUART#0_RX RS232 serial RXD for XUART #0
3 XUART#0_TX RS232 serial TXD for XUART #0
4 CAN_H CAN bus high (or second RS485 port +)
5 GND Ground
6 RS485_0- RS485 serial TX/RX - (XUART #2)
7 XUART#1_TX RS232 serial TXD for XUART #1
8 XUART#1_RX RS232 serial RXD for XUART #1
9 CAN_L CAN bus low (or second RS485 port -)

The CAN bus has optional termination resistor enabled by JP2 jumper. The termination resistor is 124 ohms across the CAN_H and CAN_L pins.

USB Header

The 5x1 pin header labeled USB3 is wired in parallel with the left-most USB host connector. It may be also used as an internal USB port. The 5x1 pin header:

Diagram

 ___________
| 1 2 3 4 5 |
\-----------/
  *

Pinout

Pin # Name Function
1 FRAME Same as ground
2 GND Ground
3 USB+
4 USB-
5 USB_5V USB 5V power

XBEE XUART

The dual in-line 10-pin headers are spaced for an XBee or XBee-PRO module. There is an XUART connected to this port as well as DIO pins.

Diagram

----		----
| 1|		|20|
| 2|		|19|
| 3|		|18|
| 4|		|17|
| 5|		|16|
| 6|		|15|
| 7|		|14|
| 8|		|13|
| 9|		|12|
|10|		|11|
----		----

Pinout

Pin # Name Function
1 VCC 3.3V
2 DOUT XUART#3 RX
3 DIN XUART#3 TX
4 NC
5 RESET# CPU_RESET# line, pull low to reset TS-7553
6 NC
7 NC
8 NC
9 DTR# Connected to DIO_25
10 GND
11 DIO4 Connected to DIO_21
12 CTS XUART#3 CTS pin, use mode=hwcts to enable this
13 NC
14 NC
15 DIO5 Connected to DIO_22
16 RTS#/DIO6 Connected to DIO_26
17 DIO3 Connected to DIO_20
18 DIO2 Connected to DIO_19
19 DIO1 Connected to DIO_18
20 DIO0 Connected to DIO_17

COM Ports

The XUART ports will be controlled with xuartctl. By default they will not have devices in /dev/.

  • XUART0 RS232
    • pins 3 (TX) and 2 (RX) of the DB9 port.
  • XUART1 RS232
    • pins 7 (TX) and 8 (RX) of the DB9 port.
  • XUART2 RS485
    • pins 1 (TX/RX +) and 6 (TS/RX -).
  • XUART3
    • pins 3 (TX) and 2 (RX) of the XBEE port.

Kernel

The kernel is built based off the sources provided by Cavium. See the Cavium Kernel page for compiling information.

Enclosures

The TS-7553 supports the TS-ENC820.

Related Links

FCC Advisory Statement