TS-CAN1: Difference between revisions
From embeddedTS Manuals
No edit summary |
No edit summary |
||
Line 149: | Line 149: | ||
! Bit | ! Bit | ||
! Description | ! Description | ||
|- | |- | ||
| 2-7 | | 2-7 | ||
| Reserved | | Reserved | ||
|- | |- | ||
| 0-1 | |||
| Select one-of-four pages for SJA1000 access. This allows all 128 registers to be accessed using only 32 bytes of I/O space. Default to all zeroes. See SJA1000 I/O page selection register. | |||
|} | |} | ||
Line 169: | Line 168: | ||
! Description | ! Description | ||
|- | |- | ||
| | | 7 | ||
| | | Reserved | ||
|- | |- | ||
| | | 6 | ||
| | | If set, it enables SJA1000 to appear in IO space location determined by mode bits 0-2. Also enables the page selection register (Base + 4) to be used. | ||
|- | |- | ||
| | | 5 | ||
| | | If set, it allows the sharing of IRQ6 and IRQ7. It can only be set for TS ARM platforms and sharing can only be used for IRQ6 and IRQ7. | ||
|- | |- | ||
| 3-4 | | 3-4 | ||
| Reserved | | Reserved | ||
|- | |- | ||
| | | 2 | ||
| | | MSB of 3 bit address select register. | ||
|- | |- | ||
| | | 1 | ||
| | | Middle of 3 bit address select register. | ||
|- | |- | ||
| | | 0 | ||
| | | LSB of 3 bit address select register. See SJA1000 I/O address selection. | ||
|} | |} | ||
Line 202: | Line 201: | ||
! Description | ! Description | ||
|- | |- | ||
| | | 6-7 | ||
| Reserved | | Reserved | ||
|- | |- | ||
| | | 5 | ||
| Jumper | | Jumper 5 (1=on, 0=off) | ||
|- | |- | ||
| | | 4 | ||
| Jumper | | Jumper 4 (1=on, 0=off) | ||
|- | |- | ||
| 3 | | 3 | ||
| Jumper 3 (1=on, 0=off) | | Jumper 3 (1=on, 0=off) | ||
|- | |- | ||
| | | 2 | ||
| Jumper | | Jumper 2 (1=on, 0=off) | ||
|- | |- | ||
| | | 1 | ||
| Jumper | | Jumper 1 (1=on, 0=off) | ||
|- | |- | ||
| | | 0 | ||
| Reserved | | Reserved | ||
|} | |} | ||
Line 229: | Line 228: | ||
| | | | ||
| | | | ||
|} | |||
== SJA1000 IO Page Selection Reg == | |||
{| class="wikitable" | |||
|- | |||
! Page | |||
! Registers | |||
! Bit1 | |||
! Bit0 | |||
|- | |||
| 1 | |||
| 00-1f | |||
| 0 | |||
| 0 | |||
|- | |||
| 2 | |||
| 20-3f | |||
| 0 | |||
| 1 | |||
|- | |||
| 3 | |||
| 40-5f | |||
| 1 | |||
| 0 | |||
|- | |||
| 4 | |||
| 60-7f | |||
| 1 | |||
| 1 | |||
|} | |||
== SJA1000 IO Address Selection Register == | |||
{| class="wikitable" | |||
|- | |||
! Address Range | |||
! Bit2 | |||
! Bit1 | |||
! Bit0 | |||
|- | |||
| 100-11f | |||
| 0 | |||
| 0 | |||
| 0 | |||
|- | |||
| 120-13f | |||
| 0 | |||
| 0 | |||
| 1 | |||
|- | |||
| 180-19f | |||
| 0 | |||
| 1 | |||
| 0 | |||
|- | |||
| 1A0-1Bf | |||
| 0 | |||
| 1 | |||
| 1 | |||
|- | |||
| 200-21f | |||
| 1 | |||
| 0 | |||
| 0 | |||
|- | |||
| 240-25f | |||
| 1 | |||
| 0 | |||
| 1 | |||
|- | |||
| 280-29f | |||
| 1 | |||
| 1 | |||
| 0 | |||
|- | |||
| 320-33f | |||
| 1 | |||
| 1 | |||
| 1 | |||
|} | |} |
Revision as of 17:45, 30 June 2011
Documents | |
---|---|
Schematic | |
Manual | |
Ocera CANOpen Manual |
Overview
The TS-CAN1 is a PC104 board which provides 1 port to connect to CAN1.1 and CAN2.0b networks.
Hardware Configuration
Jumper settings for I/O Addr selection
IO Address | JP1 | JP2 |
---|---|---|
150-157 | Off | Off |
158-15F | On | Off |
160-167 | Off | On |
168-16F | On | On |
Jumper settings for IRQ Selection
IRQ | JP4 | JP5 |
---|---|---|
None | Off | Off |
IRQ5 | On | On |
IRQ6 | On | Off |
IRQ7 | Off | On |
CAN 10 Pin Header
Pin Number | Signal |
---|---|
1 | X |
2 | CANL |
3 | GND |
4 | X |
5 | X |
6 | GND |
7 | CANH |
8 | X |
9 | X |
10 | X |
PLD Register Map
IO Address | Description | Access | Details | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Base + 0 | Board Identifier #1 | R | Fixed hex value: 0xF6 | ||||||||||||||||
Base + 1 | Board Identifier #2 | R | Fixed hex value: 0xB9 | ||||||||||||||||
Base + 2 | PLD Version Register | R | Fixed value | ||||||||||||||||
Base + 3 | LED control/status | RW |
| ||||||||||||||||
Base + 4 | Page selection register | RW |
| ||||||||||||||||
Base + 5 | Mode control Register | RW |
| ||||||||||||||||
Base + 6 | Jumper Status | R |
| ||||||||||||||||
Base + 7 | Reserved |
SJA1000 IO Page Selection Reg
Page | Registers | Bit1 | Bit0 |
---|---|---|---|
1 | 00-1f | 0 | 0 |
2 | 20-3f | 0 | 1 |
3 | 40-5f | 1 | 0 |
4 | 60-7f | 1 | 1 |
SJA1000 IO Address Selection Register
Address Range | Bit2 | Bit1 | Bit0 |
---|---|---|---|
100-11f | 0 | 0 | 0 |
120-13f | 0 | 0 | 1 |
180-19f | 0 | 1 | 0 |
1A0-1Bf | 0 | 1 | 1 |
200-21f | 1 | 0 | 0 |
240-25f | 1 | 0 | 1 |
280-29f | 1 | 1 | 0 |
320-33f | 1 | 1 | 1 |