7800V2 TS-NVRAM

Note:

This section is still under construction and may contain internal engineering notes, typos, and other developmental artefacts.

When used on the TS-7800-V2, the TS-NVRAM should be configured for linear, non-paged memory access using 16 bit memory access mode. Care should be taken that the jumper configuration matches the software register descriptions (16 bit, non-paged). The IO memory address can be set where the downstream developer likes, and 8 bit IO access is recommended for reading and setting the IO mapped registers at offsets 0x0 through 0x5. Nonvolatile memory, when properly configured, will appear at 0xf9000000 through 0xf9100000 or 0xf9200000 depending on whether the TS-NVRAM2 was configured with one or two megabytes of RAM.