TS-2800

TS-2800

Product Page
Documents
Schematic
Getting Started with TS-Linux X86
Getting Started with DOS
Further References
Intel 386EX User's Guide
Maxim Integrated Products
Omen Technologies
PC/104 Consortium Web Site
Crystal CS8900A Ethernet Controller Overview
Waterloo TCP/IP Software (WATTCP)
Processor
25MHz Intel 386EX
RAM
8MB 16 bit DRAM
DIO
20
External Interfaces
PC/104 Expansion Bus
32 Pin JEDEC socket
10Mbit Ethernet Adapter
LCD interface
Optional RS-485 support on COM1 (full duplex)
8 channel 12 bit ADC
Internal Storage Media
1 MB Flash disk with full BIOS support
Power Requirements
5V DC @ 700 mA
Operating Temperature
-20C
70C
Mechanical
3.775" x 3.55" (PC/104 mounting holes)

Introduction

The model TS-2800 is a compact, full-featured PC compatible Single Board Computer based on the 386EX processor. If you are coming up from the 8-bit microcontroller world, you will find that this product provides much more performance and much quicker development since you can now use standard PC development tools such as Turbo C or Quick Basic. If you have done work in the PC world in the past, you will find you can now build applications for a very small target that does not require a keyboard, video, floppy disks, or hard drives.

You can typically write and debug code on a host PC using standard development tools for the PC platform, then simply copy it to and run it on the TS-2800 without modification. If additional peripherals are required, the PC/104 expansion bus allows for many standard functions available off-the-shelf. It is also very simple to create a custom PC/104 daughter board for those special features that differentiate your product. Technologic Systems can provide technical support as well as a free quotation for any custom hardware, software, or BIOS modifications you may require.

This manual is fairly short. This is because for the most part, the TS-2800 is a standard 80386 based PC compatible computer, and there are hundreds of books about writing software for the PC platform. The purpose of this manual is documenting where the TS-2800 differs from a standard PC.

PC Compatibility

PC compatibility requires much more than just a 386 processor. It requires PC compatible memory and I/O maps as well as a PC compatible BIOS. The General Software EMBEDDED BIOS offers a high degree of compatibility with past and present BIOS standards allowing it to run off-the shelf operating systems and application software.

The EMBEDDED BIOS has been tested with all major versions of DOS, including MS-DOS, DR-DOS, and Embedded DOS 6-XL; all major versions of OS/2, including MS-OS/2 and IBM OS/2; MSWindows 3.1, Windows-95, Windows NT, and NetWare 386.

Technologic Systems Embedded PCs are compatible with a wide variety of x86 based operating systems. A partial list OSes currently used with our boards by customers includes:

• GNU/Linux, kernel versions 1.0.x, 2.0.x, and 2.2.x
• TNT Embedded Toolsuite, Phar Lap Software
• RTKernel, On Time Software
• RTEMS, On-Line Applications Research Corporation
• DOS with Waterloo TCP (WATTCP), public domain TCP/IP source code for DOS

Power

The TS-2800 requires regulated +5VDC at 700mA (typical). A quick release screw-down terminal block for the +5V power and power GND connections is provided for easy connection to an external power supply.

When power is first supplied to the TS-2800, the board mounted LED (labeled D2) is immediately turned on under hardware control. Once the processor begins execution, the LED is turned off under software control. If the LED does not turn on at all, the most likely problem is the power supply. Check that the +5V and GND connections are not reversed. A diode protects the board against damage in such a situation, but it will not run.

Please note that supply voltages over +6VDC may damage the TS-2800. Be sure to use a regulated +5VDC power supply.

Memory

DRAM

The TS-2800 has a total of 8 Megabytes (MB) of DRAM providing 640 Kilobytes (KB) of base memory, 7 MB of extended memory, and 128 KB of shadow RAM for the BIOS and DOS-ROM. This is identical to a standard PC memory map. The Flash SSD is the exception -- see below for details.

As shipped, the 7 MB of extended memory are used as a RAM disk by the vdisk.sys device driver. The RAM disk is accessible as drive C: if the DiskOnChip Flash disk is not installed, drive D: if it is. The size of the disk can be changed to provide extended memory for an application (or simply removed entirely) by editing the CONFIG.SYS file in the root directory of drive A:.

Flash

There is a total of 1 MB of Flash memory on the TS-2800. The top 128 KB of Flash are reserved for the BIOS and DOS-ROM. During POST, they are copied from Flash into DRAM at addresses E0000h through FFFFFh for improved performance (a standard technique known as BIOS Shadowing). The remainder of the Flash memory (896 KB) is used by a SSD (solid state disk) appearing as drive A. The SSD is fully supported by the BIOS as an INT 13h drive.

The physical Flash memory is accessed by the BIOS through a 64 KB memory mapped window at addresses D0000h through DFFFFh. If you are installing a PC/104 daughter card that uses memory mapped I/O, it must not conflict with this address range.

The Flash memory is guaranteed capable of a minimum of 100,000 write/erase cycles. This means that if you completely erase and rewrite the SSD drive 10 times a day you have over 27 years before any problems would occur. Reading the SSD produces no wear at all.

Flash Expansion

If 896 KB of Flash is insufficient for your application, an empty 32-pin socket is available for Flash expansion using an M-Systems DiskOnChip 2000 or DiskOnChip Millennium Flash Drive. This product is a wonder of miniaturization; it is a complete Flash SSD in a single 32 pin package currently available in sizes from 4 MB up to 144 MB. The DiskOnChip is available from Technologic Systems as well as other distributors. It is compatible with DOS as shipped, and drivers for other operating systems (such as Linux) are available.

When using the DiskOnChip, it will simply appear as drive C: The DiskOnChip is accessed through an 8 KB range of CE000h through CFFFFh in memory space. If you are installing a PC/104 daughter card that uses memory mapped I/O, it must not conflict with this address range if the DiskOnChip is installed. Additionally, in a DOS environment the DiskOnChip firmware uses approximately 20 KB of user RAM (below 640 KB).

Battery-Backed SRAM

The 32-pin socket can also optionally hold 32 KB of battery-backed CMOS SRAM memory. This or the DiskOnChip may be installed, but not both.

Battery backed SRAM provides non-volatile memory with unlimited write cycles and no write time degradation, unlike Flash memory. The SRAM uses an additional 32 KB range of C8000h through CFFFFh. If the SRAM is installed, PC/104 daughter card that uses memory mapped I/O must not conflict with this address range.

The SRAM can be utilized as a RAM disk (drive C:) by the TSRAMDSK.SYS device driver. The device driver can be added or removed (and the SRAM accessed directly) by editing the associated line in the CONFIG.SYS file in the root directory of drive A:. Please see the BIOS/DOS User's Manual for further information on TSRAMDSK.SYS.

I/O 75h, bit 0 can be read to determine whether the SRAM option is installed; a '1' in bit 0 indicates that it is installed, a '0' that it is not.

Serial Ports

The two PC compatible asynchronous serial ports provide a means to communicate with external serial devices such as printers, modems, etc. Each is independently configured as a standard PC COM port which is compatible with the National Semiconductor NS16C450. COM1 appears in the I/O space at 3F8h - 3FFh and uses IRQ4. COM2 is located at 2F8h - 2FFh and uses IRQ3.

The COM ports use a master clock of 1.8519 MHz as compared to a standard clock of 1.8432 MHz. This results in an error for all baud rates of .0047 (less than 0.5%). The error is insignificant and this clock value allows standard baud rate selections -- for example a divisor of 12 yields 9600 baud. By changing an internal configuration register in the 386EX, the serial clock can be switched to 12.5 MHz (the processor clock divided by 2). This feature allows baud rates higher than 115 Kbaud (up to 781 Kbaud), as well as low error, non-standard lower baud rates (such as 24 Kbaud). See Appendix F for further information.

The COM ports may also be configured to use a DMA channel, which is handy when very high baud rates are being used. When enabled, a DMA request is issued any time a serial port's receive buffer is full or its transmit buffer is empty. This allows higher speed operation with much lower CPU overhead. See the Intel 386EX User's Manual for further details.

Serial Port Configuration Registers

Because both serial ports are 100% PC compatible, software written for the PC that accesses serial ports directly or through standard BIOS calls will work without modification on the TS-2800. The details of the COM port internal registers are available in most PC documentation books or the data sheet for the National Semiconductor NS16C450 may be consulted.

Serial Port Hardware

Each serial port has 4 lines buffered: the two data lines and the CTS / RTS handshake pair. This is quite sufficient to interface with the vast majority of serial devices. The serial lines are routed to 10 pin headers labeled COM1 and COM2. A serial adapter cable can be plugged into the header to convert this into a standard DB9 male connector. The pin out for the 10 pin header and DB9 male connector are listed below. The RTS signal also drives the DTR pin on the serial ports; DTR is always the same state as RTS. In addition, RTS is also used to enable the RS-485 transmitter (see below for more details).

Figure 1 - Serial Port Header and DB9 Pinout
[signal direction is in brackets]

NC	10	5	GND
NC	9	4	DTR (RTS) [out]
[in] CTS	8	3	TX data [out]
[out] RTS	7	2	RX data [in]
NC	6	1	NC

Note:

The serial port headers use a non-standard numbering scheme. This was done so the header pins would have the same numbering as the corresponding DB-9 pin; i.e. pin 8 (CTS) on the header connects to pin 8 on the DB-9

RS-485 Support

RS-485 Quick Start Procedure

1. The RS-485 option must be installed
2. Install JP7 to enable RS-485 operation
3. Attach the RS-485 cable to the 3-pin terminal strip connector.
4. Set the COM1 UART serial parameters (baud rate, data, parity, and stop bits, interrupts, etc).
5. To transmit data, assert RTS and write the data to the UART
6. To receive data, deassert RTS and read the data from the UART

Table 1 - RS-485 Signals

Position (with terminal strip facing you)	Left	Center	Right
Silk-screen Label	X+	X-	GND
Half-duplex Usage	TX+ / RX+	TX- / RX-	GND

Table 2 - COM1 Receiver Source

JP7	Receiver Source
Installed	Half-duplex RS-485
Not installed	RS-232

Table 3 - TS-2800 Control Registers - All signals are read only through bit 0 of the address

I/O Address	R / W	Bit 0 Description
76h	Read	RS-485 option 0 = Not installed 1 = Option installed
77h	Read	Returns status of TX485EN pin

An option is available to add support to COM1 for half duplex RS-485. RS-485 drivers allow communications between multiple nodes up to 4000 feet (1200 meters) via twisted pair cable. Half-duplex RS-485 requires one twisted pair plus a Ground connection.

For half-duplex operation, a single twisted pair is used for transmitting and receiving. The serial port's RTS signal controls the RS-485 transmitter/receiver. When RTS is asserted true (bit 1 of the modem control register = 1), the RS-485 transmitter is enabled and the receiver disabled. When RTS is de-asserted the transmitter is tri-stated (disabled) and the receiver is enabled. Since the transmitter and receiver are never both enabled, the serial port UART does not receive the data transmitted. The transmitter and receiver share a single pair of signals that are available in a screw-down terminal block. See the table below for pin-outs Note: the correct jumper must be installed. See the next table for details.

Fail-safe bias resistors are used to bias both the X- and X+ lines to the correct state when these lines are not being actively driven. This is an important consideration, since in a typical RS-485 installation, the drivers are frequently tri-stated. If fail-safe bias resistors are not present, the 485 bus will be floating and very small amounts of noise can cause spurious characters at the receivers. A 1.2KW resistor is used to pull the X+ signal to 5V and another 1.2KW resistor pulls the X- signal to ground. Termination resistors are also required for reliable operation particularly when running long distances. Termination resistors should only be installed at each end of an RS-485 transmission line. In a multi-drop application where there are several drivers and/or receivers attached, only the devices at each end of the transmission line pair should have termination resistors.

Installing JP6 adds a 100Ω termination resistor to the RS-485 line.

When the RS-485 option is installed, jumper JP7 enables the RS-485 receiver to drive the COM1 UART. When JP7 is not installed, the RS-232 receiver drives the COM1 UART.

A read at I/O location 76h bit 0 will return a "1" when the RS-485 option is installed.

Adding Serial Ports

If your project requires more than two serial ports, additional ports may be added via the PC/104 expansion bus. Technologic Systems currently offers a 2 serial / 1 parallel port card, and other manufacturers sell cards with up to four additional serial ports. Typically these would be configured as COM3 or COM4 or be assigned other non-standard I/O locations. Because DOS only directly supports four serial ports, any additional ports beyond four will require software drivers.

The PC/104 bus has IRQ3, 4, 5, 6, 7 or 9 available for additional serial ports. If IRQ3 or 4 are to be used on a PC/104 expansion card, then care must be taken since COM2 and COM1 also use these IRQs, respectively. For example, if IRQ4 is used for COM3 then either COM1 must be used in a noninterrupt fashion or only one COM port can have the interrupt enabled at a time. In any case only one COM should have the Interrupt Enable (Bit 3 of Modem Control Reg.) set at any one time if they share the same IRQ. This is a standard issue with the PC architecture. A better solution is to simply use interrupts other than 3 or 4 for additional serial ports.

Synchronous Serial Port

The Intel 386EX also has a synchronous serial port that can provide bidirectional serial communications. There are four signals that support this port: SSIOTX (TX data), SSIORX (RX data), STXCLK (TX clock), and SRXCLK (RX clock). These signals are connected to the DIO1 Header (See Section 6). These signals are multiplexed with some of the COM2 handshake lines. The default configuration for these pins is for the COM2 handshake function. Please consult the Intel 386EX manual for details of reconfiguring these lines for synchronous operation (Appendix I ). When configured as a synchronous serial port, either the TX or RX channel can originate the clocking signal or receive an external clocking signal. There is a great deal of flexibility and many modes of operation. Please consult the Intel 386EX manual for further details.

Digital I/O

DIO1 Header

Figure 2 - DIO Header Pinout

P3.2	14	13	IRQ5 / P3.3
IRQ4 / P3.0	12	11	IRQ3 / P3.1
DTR2 / SRXCLK	10	9	RI2 / SRXD
DSR2 / STXCLK	8	7	RTS2 / STXD
IRQ7 / P3.5	6	5	P1.0
P1.5	4	3	P3.6
GND	2	1	5V

The DIO1 port provides +5V, GND, and 12 digital I/O lines that may be used to interface the TS-2800 with a wide range of external devices. Additional digital I/O is available on the DIO2 header. These signals are connected directly to the 386EX and several have multiple functions. For example, DIO pins 6, 11, 12, and 13 are by default IRQ7, IRQ3, IRQ4, and IRQ5 respectively. By setting configuration registers in the 386EX, these pins can be individually changed to general purpose I/O (GPIO) as high-impedance inputs, open-drain outputs, or complementary outputs. Note that these same signals are also connected directly to the PC/104 bus; if a pin is configured as GPIO, then the associated IRQ will not be available for PC/104 expansion cards.

DIO pins 7-10 can be configured as a synchronous serial port supporting baud rates to 6.25Mbaud. These pins are COM2 handshake lines by default that can be also used as GPIO.

DIO pins 3, 4, 5, and 14 are always GPIO - they do not have secondary functions.

All digital outputs can source or sink up to 8mA. All digital inputs have standard TTL level thresholds.

For further information on configuration and use of these pins, See Appendix G.

DIO2 Header

Figure 3: DIO2 Header Pinout

P1.3	14	13	IRQ6 / P3.4
TX485EN	12	11	LinkLED#
DCD2	10	9	RxLED#
RTS1 / P1.1	8	7	IN1@77
P1.2	6	5	IN2@77
LED-ON	4	3	IN3@77
GND	2	1	IN4@77

Up to 13 additional DIO lines are available on the DIO2 Header. Pins 1,3,5,and 7 are digital inputs with 10K Ohm pull-up resistors that can be read at I/O location 77h bits 1-4. Pin 4 is a Digital output that drives the TS-2800 LED. Pins 6,8,13,and 14 are i386EX programmable I/O lines. Pin 10 is a fixed input that can be read (inverted polarity) at the COM2 Status Reg. (I/O location 2FEh bit 7). Pin 12 is the signal that enables the RS-485 Transmit driver. If the RS-485 option is not installed, this pin can be read as input at I/O location 77h bit 0. Pins 9 and 11 are open-drain active-low outputs that drive the Ethernet Link and LAN LEDs. The default configuration is for these to be driven by the Ethernet controller to indicate network presence and activity. These can be reprogrammed to be general-purpose outputs. For more information regarding these 2 lines, please consult the Cirrus Logic CS8900A Users (see Appendix I ).

Note:

DIO2 pin 14 (P1.3) is also shared with user jumper JP3. If user jumper JP3 is being used, then DIO2 pin 14 should be left not connected.

For further information on configuration and use of these pins, See Appendix G.

LCD Interface

Table 5 - LCD Header Signals

Pin	Function	Comments
1	LCD 5V
2	LCD GND
3	Reg. Select	Buffered A0
4	Bias	470 Ohm to GND
5	LCD Enable	Active high
6	Write#	Active low
7	D1	D0 - D7: Buffered bi-directional data bus
8	D0
9	D3
10	D2
11	D5
12	D4
13	D7
14	D6

Figure 4 - LCD Header Pinout

2	4	6	8	10	12	14
1	3	5	7	9	11	13

A 14-pin LCD connector is provided on the TS-2800 for interfacing with standard alphanumeric LCD displays. These displays use a common controller, the Hitachi HD44780 or equivalent. While software written for the HD44780 will work with all displays using the controller, the cable needed is dependent on the display used. For most displays, a straight-through type ribbon cable can be used. The connector on the LCD display is typically mounted on the backside of the display.

WARNING:

Using an incorrect cable or mounting the LCD connector on the front-side can result in a reverse power polarity and can damage the LCD display. Please refer to your LCD data sheets for in-depth information.

The TS-2800 BIOS incorporates a fairly complete set of INT10h video routines that work with the LCD. Once the LCD has been enabled (INT15h/Func B042h - see 0 below) the LCD can be written to using the standard BIOS routines. This includes the majority of PC languages, such as C and C++. See the programs included on the utility disk for examples.

I/O addresses 72h and 73h are used to access the LCD. Figure 4 shows the header pin-out, while Table 5 lists the LCD signals. The section below will briefly describe the LCD interface signals.

The register select signal is simply the buffered A0 address line. Thus, reads and writes to 72h cause register select to be low, and those to 73h cause it to be high. Generally the LCD uses this line to separate data bytes from command bytes. See your LCD data sheet for details.

The /Write signal is an active low write enable line. LCD Select is an active high signal, raised whenever the LCD addresses are being read or written. D0 - D7 are bi-directional, buffered copies of the data bus and carry all data and commands to the LCD.

Table 4 is not the standard pin-outs given for LCD displays. But this pin-out allows a standard ribbon cable to be used when the ribbon cable is attached to the backside of the LCD.

A/D Converter

The TS-2800 supports an optional eight channel, 12-bit A/D converter (ADC) capable of 60,000 samples per second. Each channel is independently software programmable for a variety of analog input ranges: -10V to +10V, -5V to +5V, 0V to +10V, or 0V to +5V. This allows an effective dynamic range of 14 bits. Each channel is overvoltage tolerant from -16V to + 16V; a fault condition on any channel will not affect the conversion result of the selected channel. This is all accomplished with a 5V only power supply; no negative supply voltage is required. The Maxim MAX197 chip can be replaced with a MAX199 chip if a lower range of analog input levels is required (-4V to +4V, -2V to +2V, 0V to 4V,and 0V to 2V).

Table 5 - A/D registers

I/O Address	Action
78h Write	Initiate A/D Conversion
78h Read	LSB of Conversion
79h Read	MSB of Conversion
7Dh Read	Bit 0 = 1 if A/D option installed
7Eh Read	Bit 0 = 1 when Conversion completed

Table 6 - A/D Control Register (78h Write)

Bit	Description	Details
0-2	Analog channel select	Channels 0-7
3	Unipolar / Bipolar	0 = Unipolar (i.e. 0 to +5V) 1 = Bipolar (i.e. -5 to +5V)
4	Range select	0 = 5V range 1 = 10V range 5-7 Set to zero

Table 7 ADC Header

Pin	Description
1	Channel 0
3	Channel 1
5	Channel 2
7	Channel 3
9	Channel 4
11	Channel 5
13	Channel 6
15	Channel 7
Even	Analog GND

Figure 5 - ADC Header Pinout

2	4	6	8	10	12	14	16
1	3	5	7	9	11	13	15

Single Sample Acquisition Procedure

An acquisition is initiated by writing to I/O location 78h. The value written to I/O location 78h determines the channel to convert (bits 0-2) and selects one of four input ranges (bits 3,4). Bits 5-7 should be set to zero. After the write cycle to I/O location 78h, the MAX197 completes the A/D conversion in 11 mS. Bit 0 at I/O location 7Eh may be polled to determine when the conversion is complete. The conversion result is now available at locations 78h (LSB) and 79h (MSB). When using unipolar modes, the result is in binary format with the upper 4 bits of the MSB equal to zero. When a bipolar mode is used, the result is in twos-complement binary with the upper 4 bits (Bits 12- 15) equal to bit 11 (sign extended).

If more details on the A/D converter specifications are required, the Maxim web site is listed in Appendix I .

A/D Converter BIOS Call

An A/D acquisition can also be obtained through BIOS call int 15h, function B050h. By using a BIOS call, your code will operate safely even when running on a development machine without the ADC, because the function call will not "hang" if there is a hardware fault (MAX197 not populated). If the ADC completion bit is not true after 50 mS, the routine exits with an error condition.

Int 15h / Function B050h -
ENTRY:
   AX = B050h
   BL = Value to write into A/D Control register (See Table 6)
EXIT:
   CY = 0 (no error)
   AH = 0 - No Error
      1 - bad subfunction
      2 - bad input registers (i.e. if BL bit 5 set)
      3 - ADC option not present (I/O 7Dh bit 0 = 0)
      4 - Hardware error (A/D timeout)
   BX = A/D Conversion value

10Base-T Ethernet Port

The TS-2800 has full-function IEEE 802.3 Ethernet capability (10 Mbit/sec) provided by a Cirrus Logic CS8900A Ethernet controller. The CS8900A is a single-chip, 16-bit Ethernet controller that includes such features as full-duplex operation, power saving shutdown modes, and LED indicators for link status and activity. The physical interface is 10Base-T (RJ45 connector).

The TS-2800 has both a LINK LED and a LAN LED that indicates the current ethernet status. The LINK LED (labeled D4) is active when valid ethernet link pulses are detected. This LED should be ON whenever the TS-2800 is powered on and properly connected to a 10BaseT Ethernet network. The LAN LED (labeled D3) should pulse ON briefly when any network traffic is detected. This includes all traffic, not just that sent to or from the TS-2800. Both of these LEDs are controlled by the CS8900A and do not require initialization. Additionally, the LEDs can be placed under software control, allowing the customer application use of the LEDs for feedback. Please see the CS8900A User Manual, Appendix I , for further details.

A standard packet driver is installed on the board by default, along with sample network applications written with the public domain Waterloo TCP/IP software (WATTCP). WATTCP is a freely available package (including source code) that provides TCP/IP connectivity for programs written for the DOS environment.

In addition, we have written a simple DOS HTTP web server using WATTCP that is included on the TS-2800 utility disk. Full source code is included, and you are free to modify and extend the code for your own use on Technologic Systems Embedded PCs.

During POST, the BIOS initializes the CS8900A registers with the correct settings - interrupt IRQ12, I/O address range 300h - 30Fh, and I/O mapped operation. The DOS packet driver is loaded by AUTOEXEC.BAT once DOS starts. To run the sample programs (ping and finger) on the TS-2800, first examine the contents of the WATTCP.CFG configuration file in the A:\ETHERNET directory and correct any information that is not valid for your particular network. Then simply run a sample program from the DOS command line. For example:

[A:\]ping www.embeddedx86.com
Technologic Systems Example Configuration
Pinging 'www.embeddedx86.com' [209.130.84.83]
sent PING # 1 , PING receipt # 1 : response time 0.00 seconds

Ping Statistics
Sent : 1
Received : 1
Success : 100 %
Average RTT : 0.35 seconds
[A:\]

If you prefer to use a package other than WATTCP, go right ahead. Device-drivers for other operating systems and network protocols are available from both the Technologic Systems and Cirrus Logic web sites (see Appendix I ).

Real Time Clock

The Dallas Semiconductor DS12887 is used for the PC compatible battery-backed real-time clock. It is a completely self-contained module that includes a Motorola 146818 compatible clock chip, the 32.768 kHz crystal, the lithium battery, and 114 bytes of battery-backed CMOS RAM. It is guaranteed to maintain clock operation for a minimum of 10 years in the absence of power. It is located at the standard PC I/O addresses of Hex 070 and 071. The top 32 bytes (index 60h through 7Fh) are not used by the BIOS and are available for user applications.

Watchdog Timer

The Intel 386EX contains a 32-bit watchdog timer (WDT) unit that can be used in two different modes to effect a watchdog supervisory function. In either mode, a system reset is asserted when the WDT times out preventing a system "hanging" due to a software bug. To prevent a WDT timeout, the application must periodically "feed" the WDT by writing to specific I/O locations. The 32-bit downcounter allows timeout values as high as 160 seconds.

The general-purpose timer mode is more flexible in that the timeout values can be changed dynamically and the timer can be turned on and off under software control. The disadvantage of this mode is that it doesn't provide 100% protection because a bug could turn off the timer during a crash and the system would hang.

The software secure watchdog mode utilizes a "lockout sequence" to set a WDTEN bit in the watchdog status register. Once this bit is set, only a system reset can clear this bit. When WDTEN is set, it is not possible to change the WDT timeout value or to turn off the WDT. This provides a high level of assurance against errant software causing a system to hang.

For details see the Intel 386EX User Manual.

LED and Jumpers

The TS-2800 has three LEDs available for user software. The user LED (labeled D2) can be used for diagnostics, status messages, and simple output. This signal is also available as a digital output on the DIO2 port. When power is first supplied to the TS-2800, the user LED is immediately turned on under hardware control. Once the processor begins execution, the LED is turned off, then flashed on and off again briefly. After boot, this LED is reserved solely for user applications.

LEDs D3 and D4 are controlled by the CS8900A Ethernet Controller, and provide feedback on the status of the network. See Section 8 above for details.

If the user LED does not turn on at all when power is applied, the most likely problem is the power supply. Check that the +5V and GND connections are not reversed. A diode protects the board against damage in such a situation, but it will not run.

BIOS interrupt functions are used to interface software with the user LED and option jumper JP3. Please see Appendix C for further details and the utility disk for example code.

PC/104 Bus Expansion

The PC/104 is a compact implementation of the PC/AT ISA bus ideal for embedded applications. Designers benefit from using an already-developed standard, rather than creating their own. Further, the presence of a compact form-factor PC compatible standard has encouraged the development of a broad array of off-theshelf products, allowing a very quick time to market for new products.

The electrical specification for the PC/104 expansion bus is identical to the PC ISA bus. The mechanical specification allows for the very compact implementation of the ISA bus tailor made for embedded systems. The full PC/104 specification is available from the IEEE Standards Office under # IEEE P996.1 (see Appendix E for further information). Basically, this bus allows multiple daughter boards in a 3.6 inch by 3.8 inch form factor to be added in a self-stacking bus. Since the electrical specs are identical (except for drive levels) to a standard PC ISA bus, standard peripherals such as COM ports, Ethernet, video, LCD drivers, and Flash drives may be easily added using standard drivers.

The TS-2800 implements a sub-set of the 8-bit version of the PC/104 bus. We have found this allows the support of the vast majority of PC/104 boards including all of the above mentioned examples. The one feature missing is DMA, which few PC/104 boards use.

See Appendix A for information on PC/104 pin numbering

Table 2 - Supported PC/104 Signals

Pin #	Signal Name
A2 - A9	D7 through D0
A10	IOCHRDY
A11	EN
A12 - A31	A19 through A0
A32	GND
B1	GND
B2	RESETDRV
B3	+5V
B4	IRQ9
B11	SMEMW#
B12	SMEMR#
B13	IOW#
B14	IOR#
B20	SYSCLK (8.33 MHz)
B21	IRQ7 *
B22	IRQ6 *
B23	IRQ5 *
B24	IRQ4 *
B25	IRQ3 *
B28	BALE
B29	+5V
B30	OSC
B31	GND
B32	GND

Note:

*These signals are also connected to the DIO port.

Table 3 - Unsupported PC/104 Signals

Pin #	Signal Name
A1	IOCHCHK#
B5	-5V
B6	DRQ2
B7	-12V
B8	ENDXFR#
B9	+12V
B15	DACK3# *
B16	DRQ3 *
B17	DACK1#
B18	DRQ1
B19	REFRESH#
B26	DACK2#
B27	TC

Note:

*PC/104 expansion cards must not connect to these pins.

Loading, Executing and Debugging Programs

Two methods are available for transferring files between a desktop PC and your TS-2800: Zmodem downloads, and Manufacturing Mode. Full descriptions of each are detailed below. To make your program automatically execute at power up, just edit the AUTOEXEC.BAT file on the Flash SSD drive and replace the name of the factory test program (EPC-DIAG.EXE) with yours.

Zmodem Downloads

Using the Zmodem protocol to send files to and from the TS-2800 is simple and straightforward. The only requirement is a terminal emulation program that supports Zmodem, and virtually all do. If you are using Windows 9X for your development work, the HyperTerminal accessory works well. To download a file to the TS-2800 from your host PC, execute DL.BAT at the DOS command line on the TS-2800 (while using console-redirection from within your terminal emulator) and begin the transfer with your terminal emulator. In HyperTerminal, this is 'Send File...' from the 'Transfer' menu. To upload a file from the TS-2800 to your host PC, execute UL.BAT <FILENAME> at the DOS command line on the TS-2800 and start the transfer in your terminal emulator. Many emulators, HyperTerminal among them, will automatically begin the transfer themselves. Occasionally there may be errors in transmission due to background solid state disk operations. This is not a problem -- Zmodem uses very accurate CRC checks to detect errors and simply resends bad data. Once the file transfer is complete the file is completely error free. Please note that the utility used to perform Zmodem file transfers on the TS-2800 side is called DSZ, produced by Omen Technologies. DSZ is shareware -- it is not free. If you decide to use it, you are legally obligated to pay Omen Technologies. Currently the cost is $20. Further info is available in the DSZ zip file located on the utility disk, and contact info for Omen Technologies is in Appendix G.

Manufacturing Mode

The TS-2800 has a special feature called 'Manufacturing Mode' which makes the on-board Flash SSD appear as just another drive on your desktop computer using a DOS device driver and a serial cable.

First, connect a null modem cable between COM2 on the TS-2800 and COM1 or COM2 of your desktop computer. Next, the TS-2800 must be placed in Manufacturing Mode. To do so, install jumper JP1 and power cycle the unit. Manufacturing Mode will automatically start once the POST routines have been executed. At this point, the TS-2800 will simply sit and wait for serial packets to arrive from a host.

Now install the Manufacturing Mode driver on your desktop computer. To do so, simply copy the MFGDRV.SYS device driver from the utility disk to anywhere on your desktop machine's hard drive. Then insert the following line in your CONFIG.SYS file and reboot:

DEVICE=<PATH>\MFGDRV.SYS /UNIT=0 /BAUD=38K /PORT=COMX

Where <PATH> is the full path to the location where you copied the MFGDRV.SYS driver, and X is the port on your host PC that the null modem cable is connected to (1 or 2).

The Flash SSD drive should now appear on the next free drive letter on your desktop computer (usually the D: or E: drive). Simply copy your program onto the drive, and that's it!

You can create directories, edit files, and even execute programs on your desktop computer over the Manufacturing Mode link just the way you would with a regular disk drive, just a bit more slowly.

When you are finished, turn off the TS-2800, remove the jumper, and turn it back on. Your program will now execute every time the TS-2800 is turned on.

While Manufacturing Mode is in operation, the board LED provides feedback. While idle, the LED will cycle on and off at approximately 1/2 Hertz. While data is being transferred, it will cycle much more rapidly (anywhere from 5 to 1000 Hertz)

Note:

The Manufacturing Mode driver currently does not work correctly with Windows 9X (95/98). Please use the Zmodem method if you are using Windows 9X.

Appendix A: Board Diagram and Dimensions

Figure 4 - Board Diagram

Figure 5 - Board Dimensions (standard PC/104 8-bit module dimensions)

Appendix B: Operating Conditions

Operating Temperature:	0 to 70° C Extended temperature ranges are available
Operating Humidity:	0 to 90% relative humidity (non-condensing)

Appendix C: JP Jumper Block

Table 8 lists option jumpers 1 through 7 and their functions. These jumpers are clearly labeled on the upper edge of the board (see Appendix A above).

Table 9 lists option jumpers 8 through 12. These jumpers configure the 32-pin socket in four different modes. These jumpers are located to the left of the PC/104 socket and to the right of the COM 1 header.

Table 8 - Jumper Listing

Jumper	Function
JP1	Manufacturing Mode
JP2	Console Redirection
JP3	Installed for 128 or 512k SRAM
JP4	RS-485 Bias Resistors
JP5	RS-485 Bias Resistors
JP6	RS-485 Term. Res.
JP7	Half-Duplex RS-485

Table 9 - 32-Pin Socket Jumper Table

	JP 8	JP 9	JP 10	JP 11	JP 12
32K SRAM	X	X	-	-	-
Disk-On-Chip	X	X	-	-	-
128K or 512K SRAM	-	-	-	X	X
EPROM	-	-	X	X	X

Appendix D: System Memory Map

Figure 8 - TS-2800 Memory Map

	Starting Address
Resource	hex	decimal	Size
Extended Memory (RAM)	100000h	1024k	7M
BIOS (Shadow RAM)	F0000h	960k	64k
DOS / BIOS Extension (Shadow RAM)	E0000h	896k	64k
Solid-state disk drive window (Flash Drive)	D8000h	832k	32k
PC/104 or DiskOnChip	D6000h	824k	8k
PC/104 or Battery-Backed SRAM (overlaps DiskOnChip )	D0000h	800k	32k
PC/104 (typically video BIOS)	C0000h	768k	32k
PC/104 (typically video memory)	A0000h	640k	128k
Lower Memory (RAM)	00000h	00000	640k

Appendix E: System I/O Map

The following table lists the I/O addresses used by the system. All other I/O locations from 100h through 3F7h are available on the PC/104 expansion bus.

Table 5 - TS-2800 I/O Map

Hex Address	Resource
F000h - FFFFh	Internal 386EX Registers
400h - EFFFh	PC/104 Bus (Not recommended for use)
3F8h - 3FFh	COM1
2F8h - 2FFh	COM2
80h - FFh	Internal 386EX peripherals
074h - 077h	Board configuration registers
070h - 071h	RTC and CMOS memory
000h - 06Fh	Internal 386EX peripherals

Table 6 - TS-2800 Control Registers - All signals are R/W through bit 0 of the address

I/O Address	R/W	Bit 0 Description
74h	Read	Always 0
75h	Read	SRAM option 0 = Not installed 1 = Option installed
76h	Read	RS-485 option 0 = Not installed 1 = Option installed
76h	Write	TX485EN / RS-485 control 0 = disable RS-485 1 = enable RS-485 Or it controls JP header pin 11, if 485 not installed
77h	Read	Returns status of TX485EN pin

Appendix F: BIOS Interrupt Functions

We have extended the standard BIOS interrupts with several functions that simplify interfacing with the TS-2800 hardware.

Many books are available with detailed information on using interrupts with just about any language. Example code is also available on the utility disk.

Int 15h / Function B000h - Technologic Systems BIOS information

This function is mostly for our own internal use, but may be useful for user programs as well. For example, your program could have debugging code that executes on your desktop machine, but does not when the program is executing on the TS-2800.

ENTRY:
	AX = B000h
EXIT:
	CY = 0 (carry flag)
	AH = 0
	AL = SP_VERSION     For standard versions of the BIOS, this is 0. An 'SP number' is assigned when custom modifications are made to the BIOS for a client, and it is returned in this register. Contact us for further information. (00h for standard products)
	BH = BIOS Version, Major Number.     E.g. If the current BIOS version is 2.40, the register will contain 02h.
	BL = BIOS Version, Minor Number.     E.g. If the current BIOS version is 2.40, the register will contain 28h (28h = 40 decimal).
	CH = Base Flash Memory Size / 512kB     The TS-5400 is available with 1024kB of base Flash memory standard, but this can be increased to 2048 KB for custom orders. These would be returned as 02h or 04h, respectively.
	CL = 35h     This is the hardware model number (35h = 53 decimal).
	DX = Always returns: 'TS' (5453h)

Int 15h / Function B010h - LED Control

This function is used to turn the board LED on and off. You can also invert the LED, i.e. if the LED is off, it will be turned on, and if it is on it will be turned off.

ENTRY:
	AX = B010h
	BH = 00 - LED off.
	BH = 01 - LED on.
	BH = 81 - LED invert.
EXIT:
	CY = 0 (carry flag)
	AH = 00

Int 15h / Function B042h - Alphanumeric LCD Support

This routine enables and disables the console on the LCD interface. It supports all LCD displays sized 2 x 40 or smaller using a Hitachi HD44780 controller.

ENTRY:
	AX = B042h
	BH = 00 - Disable LCD
	BH = 01 - Enable LCD
	BH = 02 - Return current LCD status
EXIT:
	CY = Set if error, else clear if success (carry flag)
	AH = 00 - No Error / LCD initialized OK
	BH = 00 - LCD currently disabled / Not present
	BH = 01 - LCD currently enabled and running.

Int 15h / Function B050h - A/D Converter Control

Function B050h provides a simple interface for performing a single A/D conversion. In case of hardware failure (or the ADC option is not present), a time-out returns an error code within approximately 50 µS.

ENTRY:
	AX = B050h
	BL = Value to write into A/D Control register (See Table 6)
EXIT:
	CY = 0 (no error)
	AH = 0 No Error
	AH = 1 bad subfunction
	AH = 2 bad input registers (i.e. if BL bit 5 set)
	AH = 3 ADC option not present (I/O 7Dh bit 0 = 0)
	AH = 4 Hardware error (A/D timeout)
	BX = A/D Conversion value The ADC automatically sign-extends the result to the full 16 bits in bipolar mode, and masks the upper 4 bits in unipolar mode

Appendix G: Direct Control of the 386EX DIO Pins

The Intel386 EX processor has three 8-bit bi-directional I/O ports, all of which are functionally identical (Figure 16-1). Each port has three control registers and a status register. All three ports share pins with internal peripherals. Several of these pins are routed to the DIO ports. If your design does not require a pin's peripheral function, you can configure that pin for use as an I/O port. For example, if you don't need IRQ6 for PC/104, you can use the associated pin (386EX P3.4) as a DIO on JP header pin 10. Each pin can operate either in I/O mode or in peripheral mode. In I/O mode, a pin has three possible configurations:

• high-impedance input
• open-drain output (requires an external pull-up resistor)
• complementary output

In I/O mode, register bits control the direction (input or output) of each pin and the value of each output pin. In peripheral mode, the internal peripheral controls the operation (input or output) of the pin.

Each port has three control registers and a status register associated with it (). The control registers (PnCFG, PnDIR, and PnLTC) can be both read and written. The status register (PnPIN) can only be read. All four registers reside in I/O address space.

Table 7 - 386EX I/O Port Registers

Register	I/O Address	Description
P1CFG P3CFG (read/write)	0F820h 0F824h	Port n Mode Configuration: Each bit controls the mode of the associated pin. 0 = Selects I/O mode. 1 = Selects peripheral mode.
P1DIR P3DIR (read/write)	0F864h 0F874h	Port n Direction: Each bit controls the direction of a pin that is in I/O mode. If a pin is in peripheral mode, this value is ignored. 0 = Configures a pin as a complementary output. 1 = Configures a pin as either an input or an open-drain output.
P1LTC P3LTC (read/write)	0F862h 0F872h	Port n Data Latch: Each bit contains data to be driven on to an output pin that is in I/O mode. Write the desired pin state value to this register. If a pin is in peripheral mode, this value is ignored. Writing a value to a PL bit causes that value to be driven onto the corresponding pin. For a complementary output, write the desired pin value to its PL bit. This value is actively driven high or low onto the pin. For an open-drain output, a zero results in a actively driven low on the pin, a one results in a high-impedance (input) state at the pin. To configure a pin as an input, write a one to the corresponding PL bit. A one results in a high-impedance state at the pin, allowing external hardware to drive it. Reading this register returns the value in the register - not the actual pin state.
P1PIN P3PIN (read only)	0F860h 0F870h	Port n Pin State: Each bit of this read-only register reflects the state of the associated pin. Reading this register returns the current pin state value, regardless of the pin's mode and direction.

In the default configuration, P1.5, P1.0 and P3.6 are all initialized as inputs, while P3.0, P3.1, and P3.3 are initialized as "peripherals" (IRQ4, IRQ3, and IRQ5)

WARNING:

When changing these registers, always use read/modify/write procedures so that other port pins (used by on-board peripherals) are not affected.

For example, let's say you want to use 386EX Port 3.1 (DIO pin 11) as an output rather than IRQ3 (the default configuration).

1. Read P3CFG (I/O F824h), AND it with 0FDh, write it back to F824h. (changes from peripheral to I/O pin)
2. Read P3DIR (I/O F874h), AND it with 0FDh, write it back to F874h. (this made it a complementary output)
3. To set this pin to a "1", Read P3LTC (I/O F872h), OR it with 02h, write it back.

Note:

Because the serial ports are internal to the 386EX, COM1 and COM2 can still use IRQ4 and IRQ3 even when the associated pins P3.1 and P3.0 are configured as DIO pins DIO1.11 and DIO1.12 - the interrupts are simply no longer available on the PC/104 bus.

Appendix H: Using A 12.5 MHz Baud Clock

Each serial port baud rate generator clock can be independently switched between either the standard 1.85 MHz clock or a 12.5 MHz clock (the internal processor clock divided by 2). Changing the clock to 12.5 MHz allows baud rates higher than 115 kbaud (up to 781 kbaud), as well as low error, non-standard lower baud rates (such as 24 kbaud).

The baud rate clock is controlled by I/O location 0F836h:

• Bit 0 controls COM1.
• Bit 1 controls COM2.

Setting a bit to 0 uses the standard 1.85 MHz clock, and setting a bit to 1 uses the 12.5 MHz processor clock. NOTE: You must not modify the other bits of this register. You must use a readmodify- write procedure to change these bits. The following example in assembly illustrates this:

MOV  DX, 0F836       ; load the I/O address
IN   AL, DX          ; read the configuration register
OR   AL, 00000001b   ; switch COM1 to the 12.5 MHz clock
OUT  DX, AL          ; write the register

Product Notes

FCC Advisory

This equipment generates, uses, and can radiate radio frequency energy and if not installed and used properly (that is, in strict accordance with the manufacturer's instructions), may cause interference to radio and television reception. It has been type tested and found to comply with the limits for a Class A digital device in accordance with the specifications in Part 15 of FCC Rules, which are designed to provide reasonable protection against such interference when operated in a commercial environment. Operation of this equipment in a residential area is likely to cause interference, in which case the owner will be required to correct the interference at his own expense.

If this equipment does cause interference, which can be determined by turning the unit on and off, the user is encouraged to try the following measures to correct the interference:

Reorient the receiving antenna. Relocate the unit with respect to the receiver. Plug the unit into a different outlet so that the unit and receiver are on different branch circuits. Ensure that mounting screws and connector attachment screws are tightly secured. Ensure that good quality, shielded, and grounded cables are used for all data communications. If necessary, the user should consult the dealer or an experienced radio/television technician for additional suggestions. The following booklets prepared by the Federal Communications Commission (FCC) may also prove helpful:

How to Identify and Resolve Radio-TV Interference Problems (Stock No. 004-000-000345-4) Interface Handbook (Stock No. 004-000-004505-7) These booklets may be purchased from the Superintendent of Documents, U.S. Government Printing Office, Washington, DC 20402.

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