TS-7970 Silabs
The TS-7970 includes a supervisory microcontroller to provide 3 functions:
- ADC channels
- Sleep Mode
- USB Console (/dev/ttymxc0)
- RTC (REV H and beyond only)
Prior to REV H boards, this was using a Silicon labs microcontroller, and on REV H and later this is using a Renesas Microcontroller. These behave the same, but the REV H uses a different USB driver. REV E and below use the Silicon Labs CP201x driver. This is present on most Linux distributions. On Windows this is available with a WHQL signed driver from Silabs. REV H and beyond use the standard CDC-ACM class device which is also present in both Linux and Windows by default.
The RTC on REV E and earlier is an Intersil ISL12020. On REV H and beyond, the RTC functionality is provided by the Renesas Microcontroller using the same Register set as the intersil. While this is capable of keeping time and providing the same NVRAM functionality as the original part, it does not support the same temperature compensation as the original part. The original intersil RTC part could achieve less than ±5ppm drift across temperature, while the Renesas microcontroller is less than ±20ppm. Contact us if you require the higher accuracy.
The microcontroller exists at address 0x10 on I2C bus 0 using 8-bit address and data. It can be read for up to 32 bytes to get the ADC values, and firmware revision. Our example code 'tsmicroctl -i' includes reading all the ADC channels in millivolts and the firmware revision. For example:
# tsmicroctl -i VDD_ARM_CAP=1026 VDD_HIGH_CAP=2603 VDD_SOC_CAP=1239 VDD_ARM=1451 SILAB_P10=0x0 SILAB_P11=0x0 SILAB_P12=0x0 VIN=4779 V5_A=5189 V3P1=3230 DDR_1P5V=1559 V1P8=1904 V1P2=1259 RAM_VREF=778 V3P3=3522 SILABREV=1
In U-Boot, the 'tsmicroctl' command can be used (with no arguments) to read the same values.
The sleep mode is accessible from U-Boot with 'tsmicroctl <seconds>' and in Linux with 'tsmicroctl -s <seconds>'. This will power off everything on the board except the microcontroller. The blue LED will blink while it is in this mode.
The original Silicon Labs would sample all ADC channels in a 10-bit scale of 0-2.5V. On the Renesas microcontroller, this is now a 12-bit scale of 0-3.3V. The Renesas scales these down to the old ranges/values to match the original Silicon Labs ADC output. To scale for real millivolts the code should be written assuming the resistor dividers from REV E, as well as a 0-2.5V VREF and 10-bits. This is already supported in tsmicroctl.c.
The microcontroller samples all ADC channels in a scale of 0-2.5 V. The schematic shows the voltage dividers to bring the higher voltages it samples into this range.
| Register | Description |
|---|---|
| 0 | VDD_ARM_CAP MSB |
| 1 | VDD_ARM_CAP LSB |
| 2 | VDD_HIGH_CAP MSB |
| 3 | VDD_HIGH_CAP LSB |
| 4 | VDD_SOC_CAP MSB |
| 5 | VDD_SOC_CAP LSB |
| 6 | VDD_ARM MSB |
| 7 | VDD_ARM LSB |
| 8 | SILAB_P10 MSB |
| 9 | SILAB_P10 LSB |
| 10 | SILAB_P11 MSB |
| 11 | SILAB_P11 LSB |
| 12 | SILAB_P12 MSB |
| 13 | SILAB_P12 LSB |
| 14 | VIN MSB |
| 15 | VIN LSB |
| 16 | V5_A MSB |
| 17 | V5_A LSB |
| 18 | V3P1 MSB |
| 19 | V3P1 LSB |
| 20 | DDR_1P5V MSB |
| 21 | DDR_1P5V LSB |
| 22 | V1P8 MSB |
| 23 | V1P8 LSB |
| 24 | V1P2 MSB |
| 25 | V1P2 LSB |
| 26 | RAM_VREF MSB |
| 27 | RAM_VREF LSB |
| 28 | V3P3 MSB |
| 29 | V3P3 LSB |
| 30 | Firmware Revision |