TS-7120 FPGA: Difference between revisions

From embeddedTS Manuals
No edit summary
No edit summary
Line 53: Line 53:
| Syscon
| Syscon
|-
|-
|}
== Syscon ==
{| class=wikitable
! Offset
! Bits
! Description
|-
| 0x0
| 31:0
| Model ID
|-
| rowspan=7 | 0x8 (write)
| 31:20
| Reserved
|-
| 19
| Toggles when data_valid ASMI output is 1
|-
| 18
| Illegal Erase
|-
| 17
| Illegal Write
|-
| 16
| ASMI Busy
|-
| 15:8
| ASMI Status out
|-
| 7:0
| ASMI Data out
|-
| rowspan=4 | 0x8 (write)
| 31
| Reserved
|-
| 30:29
| Operation
{| class=wikitable
| 0
| Read
|-
| 1
| Write
|-
| 2
| Sector Erase
|-
| 3
| Read Status
|}
|-
| 28:8
| ASMI Address
|-
| 7:0
| ASMI data in
|-
| 0x9
| testing
|}
|}

Revision as of 16:14, 15 January 2019

The TS-7120 FPGA is connected to the CPU over the WEIM bus. This provides 8-bit, 16-bit, or 32-bit access to the FPGA mapped at 0x5000_0000.

For example, to read the syscon 0x0: 

peekpoke 32 0x50004000
Offset Description
0x00 16550 #0
0x10 16550 #1
0x20 16550 #2
0x30 16550 #3
0x40 16550 #4
0x50 16550 #5
0x60 16550 #6
0x70 16550 #7
0x80 16550 #8
0x180 Opencore SPI controller #0
0x19c Opencore SPI controller #1
0x1b8 Opencore SPI controller #2
0x280 TS SDcore
0x4000 Syscon

Syscon

Offset Bits Description
0x0 31:0 Model ID
0x8 (write) 31:20 Reserved
19 Toggles when data_valid ASMI output is 1
18 Illegal Erase
17 Illegal Write
16 ASMI Busy
15:8 ASMI Status out
7:0 ASMI Data out
0x8 (write) 31 Reserved
30:29 Operation
0 Read
1 Write
2 Sector Erase
3 Read Status
28:8 ASMI Address
7:0 ASMI data in
0x9 testing
Retrieved from "http://docs.embeddedTS.com/index.php?title=TS-7120_FPGA&oldid=10217"