TS-4900 FPGA Changelog: Difference between revisions
From embeddedTS Manuals
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m (Links auto-updated for 2022 re-branding ( https://files.embeddedarm.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20150930.bin → https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20150930.bin https://files.embeddedarm.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20150603.bin → https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20150603.bin https://files.embeddedarm.com/ts-socket-m...) |
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! md5sum | ! md5sum | ||
! Changes | ! Changes | ||
|- | |- | ||
| [ | | [https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20140924.bin ts4900-fpga-20140924.bin] | ||
| d400e6c7806998e0f1b6cceb0fec022b | | d400e6c7806998e0f1b6cceb0fec022b | ||
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* Initial Release | * Initial Release | ||
|- | |- | ||
| [ | | [https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20150326.bin ts4900-fpga-20150326.bin] | ||
| 630a108d8c1af527101ee6559949b761 | | 630a108d8c1af527101ee6559949b761 | ||
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Line 26: | Line 21: | ||
* implemented MAX3100 SPI uart in the FPGA to add one more uart. | * implemented MAX3100 SPI uart in the FPGA to add one more uart. | ||
* Updated mapping for REV C boards. | * Updated mapping for REV C boards. | ||
|- | |- | ||
| [ | | [https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20150603.bin ts4900-fpga-20150603.bin] | ||
| 75d5ef9653662dca96e2813de2804387 | | 75d5ef9653662dca96e2813de2804387 | ||
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Line 36: | Line 28: | ||
* Fixed ttymxc3 RXD crossbar value | * Fixed ttymxc3 RXD crossbar value | ||
** Work around this with older bitstreams by running "tshwctl --addr 3 --poke 0x50" | ** Work around this with older bitstreams by running "tshwctl --addr 3 --poke 0x50" | ||
|- | |||
| [https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20150930.bin ts4900-fpga-20150930.bin] | |||
| bf93c03ef914cf008287c8cd60781cc8 | |||
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* Corrected CTS/RTS polarity in the MAX3100 UART | |||
* Corrected flipped CTS/RTS on the CPU uart for bluetooth | |||
|- | |||
| [https://files.embeddedTS.com/ts-socket-macrocontrollers/ts-4900-linux/fpga/ts4900-fpga-20170510.bin ts4900-fpga-20170510.bin] | |||
| 86c7c3d7fb9c607af1ef55e1222b4416 | |||
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* Fixed TXEN on CPU UARTs not correctly asserting in some multi-byte transmits | |||
|} | |} |
Latest revision as of 16:56, 17 January 2022
The FPGA is stored in /boot/ts4900-fpga.bin on most images. The latest software releases will include the latest FPGA, but older images can be updated if the md5sum matches an outdated bitstream.
Release | md5sum | Changes |
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ts4900-fpga-20140924.bin | d400e6c7806998e0f1b6cceb0fec022b |
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ts4900-fpga-20150326.bin | 630a108d8c1af527101ee6559949b761 |
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ts4900-fpga-20150603.bin | 75d5ef9653662dca96e2813de2804387 |
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ts4900-fpga-20150930.bin | bf93c03ef914cf008287c8cd60781cc8 |
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ts4900-fpga-20170510.bin | 86c7c3d7fb9c607af1ef55e1222b4416 |
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