TS-4100 FPGA DIO Table: Difference between revisions
From embeddedTS Manuals
(Created page with "The FPGA IO in Linux are GPIO 160-287. The crossbar mode indicates what this pin will output. For example, by default SPARE_4 outputs the value it samples from the WIFI_IRQ ...") |
(Updated layout with chip and pin numbering for GPIO) |
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(10 intermediate revisions by one other user not shown) | |||
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{| class="wikitable sortable" | {| class="wikitable sortable" | ||
|- | |- | ||
! | ! Chip | ||
! GPIO | ! Pin | ||
! Default Crossbar | ! Signal Name | ||
! Location<ref>GPIO pins are formatted in "<chip>_<pin>" notation.</ref> | |||
! Default Crossbar Input | |||
|- | |- | ||
| SPARE_1 | | 5 | ||
| | | 1 | ||
| GPIO | | [[#FPGA_Register|SPARE_1]] | ||
| | | [[#CPU_GPIO_Table|CPU GPIO 0_18]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| SPARE_2 | | 5 | ||
| | | 2 | ||
| GPIO | | [[#FPGA_Register|SPARE_2]] | ||
| | | [[#CPU_GPIO_Table|CPU GPIO 0_19]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| SPARE_3 | | 5 | ||
| | | 3 | ||
| GPIO | | [[#FPGA_Register|SPARE_3]] | ||
| | | [[#CPU_GPIO_Table|CPU GPIO 3_16]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 4 | ||
| | | [[#FPGA_Register|SPARE_4]] | ||
| CPU GPIO | | [[#CPU_GPIO_Table|CPU GPIO 4_8]] | ||
| [[#Crossbar|WIFI_IRQ]] | |||
|- | |- | ||
| | | 5 | ||
| | | 5 | ||
| GPIO | | [[#FPGA_Register|UART2_TXD]] | ||
| | | [[#UARTs|CPU UART2_TXD]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 6 | |||
| [[#FPGA_Registers|UART2_CTS#]] | |||
| [[#UARTs|CPU UART2_CTS#]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 7 | |||
| [[#FPGA_Regsiters|UART3_TXD]] | |||
| [[#UARTs|CPU UART3_TXD]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 8 | |||
| [[#FPGA_Registers|UART6_TXD]] | |||
| [[#UARTs|CPU UART6_TXD]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 9 | |||
| [[#FPGA_Registers|UART2_RXD]] | |||
| [[#UARTs|CPU UART2_RXD]] | |||
| [[#Crossbar|WIFI_RXD]] | |||
|- | |||
| 5 | |||
| 10 | |||
| [[#FPGA_Registers|UART2_RTS#]] | |||
| [[#UARTs|CPU UART2_RTS#]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 11 | |||
| [[#FPGA_Registers|UART3_RXD]] | |||
| [[#UARTs|CPU UART3_RXD]] | |||
| [[#Crossbar|UARTA_RXD]] | |||
|- | |||
| 5 | |||
| 12 | |||
| [[#FPGA_Registers|UART6_RXD]] | |||
| [[#UARTs|CPU UART6_RXD]] | |||
| [[#Crossbar|UARTB_RXD]] | |||
|- | |||
| 5 | |||
| 13 | |||
| [[#FPGA_Registers|WIFI_RXD]] | |||
| [[#Bluetooth|Wi-Fi/BT Module TXD]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 14 | |||
| [[#FPGA_Registers|WIFI_RTS#]] | |||
| [[#Bluetooth|Wi-Fi/BT Module RTS#]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 15 | |||
| [[#FPGA_Registers|WIFI_IRQ#]] | |||
| [[#Wi-Fi|Wi-Fi/BT Module IRQ]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 16 | |||
| [[#FPGA_Registers|WIFI_TXD]] | |||
| [[#Bluetooth|Wi-Fi/BT Module RXD]] | |||
| [[#Crossbar|UART2_TXD]] | |||
|- | |||
| 5 | |||
| 17 | |||
| [[#FPGA_Registers|WIFI_CTS#]] | |||
| [[#Bluetooth|Wi-Fi/BT Module CTS#]] | |||
| [[#UARTs|UART2_CTS#]] | |||
|- | |||
| 5 | |||
| 18 | |||
| [[#FPGA_Registers|ZPU_BREAK]] | |||
| [[#ZPU|ZPU Output]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 19 | |||
| [[#FPGA_Registers|ZPU_RESET]] | |||
| [[#ZPU|ZPU Input]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 20 | |||
| [[#FPGA_Registers|EN_WIFI_PWR]] | |||
| [[#Wi-Fi|Wi-Fi/BT Module CHIP_EN]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 21 | |||
| [[#FPGA_Registers|WIFI_RESET#]] | |||
| [[#Wi-Fi|Wi-Fi/BT Module WIFI_RESET#]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 22 | |||
| [[#FPGA_Registers|EN_USB_HOST_5V]] | |||
| [[#TS-SOCKET|CN1_004]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 23 | |||
| [[#FPGA_Registers|EN_LCD_3V3]] | |||
| [[#TS-SOCKET|CN1_048]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 24 | |||
| [[#FPGA_Registers|ETH_PHY_RESET#]] | |||
| [[#Ethernet|Ethernet PHY]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 25 | |||
| [[#FPGA_Registers|OFF_BD_RESET#]] | |||
| [[#TS-SOCKET|CN1_009]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 27 | |||
| [[#FPGA_Registers|GREEN_LED#]] | |||
| [[#TS-SOCKET|CN2_008]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 28 | |||
| [[#FPGA_Registers|RED_LED#]] | |||
| [[#TS-SOCKET|CN2_006]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 29 | |||
| [[#FPGA_Registers|UARTA_RXD]] | |||
| [[#TS-SOCKET|CN2_078]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 30 | |||
| [[#FPGA_Registers|UARTB_RXD]] | |||
| [[#TS-SOCKET|CN2_088]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 31 | |||
| [[#FPGA_Registers|UARTC_RXD]] | |||
| [[#TS-SOCKET|CN2_096]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 32 | |||
| [[#FPGA_Registers|UARTD_RXD]] | |||
| [[#TS-SOCKET|CN2_100]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 33 | |||
| [[#FPGA_Registers|UARTA_TXD]] | |||
| [[#TS-SOCKET|CN2_082]] | |||
| [[#Crossbar|UART3_TXD]] | |||
|- | |||
| 5 | |||
| 34 | |||
| [[#FPGA_Registers|UARTB_TXD]] | |||
| [[#TS-SOCKET|CN2_086]] | |||
| [[#Crossbar|UART6_TXD]] | |||
|- | |||
| 5 | |||
| 35 | |||
| [[#FPGA_Registers|UARTC_TXD]] | |||
| [[#TS-SOCKET|CN2_094]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 36 | |||
| [[#FPGA_Registers|UARTD_TXD]] | |||
| [[#TS-SOCKET|CN2_098]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 37 | |||
| [[#FPGA_Registers|DIO_00]] | |||
| [[#TS-SOCKET|CN1_093]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 38 | |||
| [[#FPGA_Registers|DIO_01]] | |||
| [[#TS-SOCKET|CN1_091]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 39 | |||
| [[#FPGA_Registers|DIO_02]] | |||
| [[#TS-SOCKET|CN1_089]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 40 | |||
| [[#FPGA_Registers|DIO_03]] | |||
| [[#TS-SOCKET|CN1_087]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 41 | |||
| [[#FPGA_Registers|DIO_04]] | |||
| [[#TS-SOCKET|CN1_085]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 42 | |||
| [[#FPGA_Registers|DIO_05]] | |||
| [[#TS-SOCKET|CN1_083]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 43 | |||
| [[#FPGA_Registers|DIO_06]] | |||
| [[#TS-SOCKET|CN1_081]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 44 | |||
| [[#FPGA_Registers|DIO_07]] | |||
| [[#TS-SOCKET|CN1_079]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 45 | |||
| [[#FPGA_Registers|DIO_08]] | |||
| [[#TS-SOCKET|CN1_077]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 46 | |||
| [[#FPGA_Registers|DIO_09]] | |||
| [[#TS-SOCKET|CN1_073]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 49 | |||
| [[#FPGA_Registers|DIO_12]] | |||
| [[#TS-SOCKET|CN1_067]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 50 | |||
| [[#FPGA_Registers|DIO_13]] | |||
| [[#TS-SOCKET|CN1_065]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 51 | |||
| [[#FPGA_Registers|DIO_14]] | |||
| [[#TS-SOCKET|CN1_063]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 52 | |||
| [[#FPGA_Registers|DIO_15]] | |||
| [[#TS-SOCKET|CN1_061]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 53 | |||
| [[#FPGA_Registers|DIO_16]] | |||
| [[#TS-SOCKET|CN1_059]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 54 | |||
| [[#FPGA_Registers|DIO_17]] | |||
| [[#TS-SOCKET|CN1_097]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 55 | |||
| [[#FPGA_Registers|DIO_18]] | |||
| [[#TS-SOCKET|CN1_099]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 56 | |||
| [[#FPGA_Registers|DIO_19]] | |||
| [[#TS-SOCKET|CN1_100]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 57 | |||
| [[#FPGA_Registers|DIO_20]] | |||
| [[#TS-SOCKET|CN1_098]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 58 | |||
| [[#FPGA_Registers|DIO_21]] | |||
| [[#TS-SOCKET|CN1_096]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 59 | |||
| [[#FPGA_Registers|DIO_22]] | |||
| [[#TS-SOCKET|CN1_094]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 60 | |||
| [[#FPGA_Registers|DIO_23]] | |||
| [[#TS-SOCKET|CN1_092]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 61 | |||
| [[#FPGA_Registers|DIO_24]] | |||
| [[#TS-SOCKET|CN1_090]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 62 | |||
| [[#FPGA_Registers|DIO_25]] | |||
| [[#TS-SOCKET|CN1_088]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 63 | |||
| [[#FPGA_Registers|DIO_26]] | |||
| [[#TS-SOCKET|CN1_086]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 64 | |||
| [[#FPGA_Registers|DIO_27]] | |||
| [[#TS-SOCKET|CN1_084]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 65 | |||
| [[#FPGA_Registers|DIO_28]] | |||
| [[#TS-SOCKET|CN1_082]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 66 | |||
| [[#FPGA_Registers|DIO_29]] | |||
| [[#TS-SOCKET|CN1_080]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 67 | |||
| [[#FPGA_Registers|DIO_30]] | |||
| [[#TS-SOCKET|CN1_078]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 68 | |||
| [[#FPGA_Registers|DIO_31]] | |||
| [[#TS-SOCKET|CN1_076]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 69 | |||
| [[#FPGA_Registers|DIO_32]] | |||
| [[#TS-SOCKET|CN1_074]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 70 | |||
| [[#FPGA_Registers|DIO_33]] | |||
| [[#TS-SOCKET|CN1_072]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 71 | |||
| [[#FPGA_Registers|DIO_34]] | |||
| [[#TS-SOCKET|CN1_070]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 72 | |||
| [[#FPGA_Registers|DIO_35]] | |||
| [[#TS-SOCKET|CN1_068]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 73 | |||
| [[#FPGA_Registers|DIO_36]] | |||
| [[#TS-SOCKET|CN1_066]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 74 | |||
| [[#FPGA_Registers|DIO_37]] | |||
| [[#TS-SOCKET|CN1_064]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 75 | |||
| [[#FPGA_Registers|DIO_38]] | |||
| [[#TS-SOCKET|CN1_060]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 76 | |||
| [[#FPGA_Registers|DIO_39]] | |||
| [[#TS-SOCKET|CN1_058]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 78 | |||
| [[#FPGA_Registers|DIO_41]] | |||
| [[#TS-SOCKET|CN1_024]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 79 | |||
| [[#FPGA_Registers|DIO_42]] | |||
| [[#TS-SOCKET|CN1_026]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 80 | |||
| [[#FPGA_Registers|DIO_43]] | |||
| [[#TS-SOCKET|CN1_019]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 81 | |||
| [[#FPGA_Registers|DIO_44]] | |||
| [[#TS-SOCKET|CN1_021]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 82 | |||
| [[#FPGA_Registers|DIO_45]] | |||
| [[#TS-SOCKET|CN1_037]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |||
| 5 | |||
| 83 | |||
| [[#FPGA_Registers|DIO_46]] | |||
| [[#TS-SOCKET|CN1_039]] | |||
| [[#Crossbar|GPIO]] | |||
|} | |} | ||
<references/> |
Latest revision as of 15:07, 25 June 2019
- ↑ GPIO pins are formatted in "<chip>_<pin>" notation.