TS-4100 FPGA DIO Table: Difference between revisions
From embeddedTS Manuals
No edit summary |
(Updated layout with chip and pin numbering for GPIO) |
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{| class="wikitable sortable" | {| class="wikitable sortable" | ||
|- | |- | ||
! | ! Chip | ||
! GPIO | ! Pin | ||
! Default Crossbar | ! Signal Name | ||
! Location<ref>GPIO pins are formatted in "<chip>_<pin>" notation.</ref> | |||
! Default Crossbar Input | |||
|- | |- | ||
| SPARE_1 | | 5 | ||
| | | 1 | ||
| GPIO | | [[#FPGA_Register|SPARE_1]] | ||
| | | [[#CPU_GPIO_Table|CPU GPIO 0_18]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| SPARE_2 | | 5 | ||
| | | 2 | ||
| GPIO | | [[#FPGA_Register|SPARE_2]] | ||
| | | [[#CPU_GPIO_Table|CPU GPIO 0_19]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| SPARE_3 | | 5 | ||
| | | 3 | ||
| GPIO | | [[#FPGA_Register|SPARE_3]] | ||
| | | [[#CPU_GPIO_Table|CPU GPIO 3_16]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 4 | ||
| | | [[#FPGA_Register|SPARE_4]] | ||
| CPU GPIO | | [[#CPU_GPIO_Table|CPU GPIO 4_8]] | ||
| [[#Crossbar|WIFI_IRQ]] | |||
|- | |- | ||
| | | 5 | ||
| | | 5 | ||
| | | [[#FPGA_Register|UART2_TXD]] | ||
| CPU | | [[#UARTs|CPU UART2_TXD]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 6 | ||
| | | [[#FPGA_Registers|UART2_CTS#]] | ||
| CPU | | [[#UARTs|CPU UART2_CTS#]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 7 | ||
| | | [[#FPGA_Regsiters|UART3_TXD]] | ||
| CPU | | [[#UARTs|CPU UART3_TXD]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 8 | ||
| | | [[#FPGA_Registers|UART6_TXD]] | ||
| CPU | | [[#UARTs|CPU UART6_TXD]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 9 | ||
| | | [[#FPGA_Registers|UART2_RXD]] | ||
| CPU | | [[#UARTs|CPU UART2_RXD]] | ||
| [[#Crossbar|WIFI_RXD]] | |||
|- | |- | ||
| | | 5 | ||
| | | 10 | ||
| | | [[#FPGA_Registers|UART2_RTS#]] | ||
| CPU | | [[#UARTs|CPU UART2_RTS#]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 11 | ||
| | | [[#FPGA_Registers|UART3_RXD]] | ||
| CPU | | [[#UARTs|CPU UART3_RXD]] | ||
| [[#Crossbar|UARTA_RXD]] | |||
|- | |- | ||
| | | 5 | ||
| | | 12 | ||
| | | [[#FPGA_Registers|UART6_RXD]] | ||
| CPU | | [[#UARTs|CPU UART6_RXD]] | ||
| [[#Crossbar|UARTB_RXD]] | |||
|- | |- | ||
| WIFI_RXD | | 5 | ||
| | | 13 | ||
| GPIO | | [[#FPGA_Registers|WIFI_RXD]] | ||
| [[#Bluetooth|Wi-Fi/BT Module TXD]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 14 | ||
| | | [[#FPGA_Registers|WIFI_RTS#]] | ||
| | | [[#Bluetooth|Wi-Fi/BT Module RTS#]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 15 | ||
| | | [[#FPGA_Registers|WIFI_IRQ#]] | ||
| | | [[#Wi-Fi|Wi-Fi/BT Module IRQ]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| WIFI_TXD | | 5 | ||
| | | 16 | ||
| | | [[#FPGA_Registers|WIFI_TXD]] | ||
| | | [[#Bluetooth|Wi-Fi/BT Module RXD]] | ||
| [[#Crossbar|UART2_TXD]] | |||
|- | |- | ||
| | | 5 | ||
| | | 17 | ||
| | | [[#FPGA_Registers|WIFI_CTS#]] | ||
| | | [[#Bluetooth|Wi-Fi/BT Module CTS#]] | ||
| [[#UARTs|UART2_CTS#]] | |||
|- | |- | ||
| ZPU_BREAK | | 5 | ||
| | | 18 | ||
| GPIO | | [[#FPGA_Registers|ZPU_BREAK]] | ||
| [[#ZPU|ZPU Output]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| ZPU_RESET | | 5 | ||
| | | 19 | ||
| GPIO | | [[#FPGA_Registers|ZPU_RESET]] | ||
| [[#ZPU|ZPU Input]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 20 | ||
| | | [[#FPGA_Registers|EN_WIFI_PWR]] | ||
| | | [[#Wi-Fi|Wi-Fi/BT Module CHIP_EN]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| WIFI_RESET | | 5 | ||
| | | 21 | ||
| GPIO | | [[#FPGA_Registers|WIFI_RESET#]] | ||
| [[#Wi-Fi|Wi-Fi/BT Module WIFI_RESET#]] | |||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 22 | ||
| | | [[#FPGA_Registers|EN_USB_HOST_5V]] | ||
| CN1_004 | | [[#TS-SOCKET|CN1_004]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 23 | ||
| | | [[#FPGA_Registers|EN_LCD_3V3]] | ||
| CN1_048 | | [[#TS-SOCKET|CN1_048]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 24 | ||
| | | [[#FPGA_Registers|ETH_PHY_RESET#]] | ||
| | | [[#Ethernet|Ethernet PHY]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 25 | ||
| | | [[#FPGA_Registers|OFF_BD_RESET#]] | ||
| CN1_009 | | [[#TS-SOCKET|CN1_009]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 27 | ||
| | | [[#FPGA_Registers|GREEN_LED#]] | ||
| CN2_008 | | [[#TS-SOCKET|CN2_008]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 28 | ||
| | | [[#FPGA_Registers|RED_LED#]] | ||
| CN2_006 | | [[#TS-SOCKET|CN2_006]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 29 | ||
| | | [[#FPGA_Registers|UARTA_RXD]] | ||
| CN2_078 | | [[#TS-SOCKET|CN2_078]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 30 | ||
| | | [[#FPGA_Registers|UARTB_RXD]] | ||
| CN2_088 | | [[#TS-SOCKET|CN2_088]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 31 | ||
| | | [[#FPGA_Registers|UARTC_RXD]] | ||
| CN2_096 | | [[#TS-SOCKET|CN2_096]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 32 | ||
| | | [[#FPGA_Registers|UARTD_RXD]] | ||
| CN2_100 | | [[#TS-SOCKET|CN2_100]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 33 | ||
| | | [[#FPGA_Registers|UARTA_TXD]] | ||
| CN2_082 | | [[#TS-SOCKET|CN2_082]] | ||
| [[#Crossbar|UART3_TXD]] | |||
|- | |- | ||
| | | 5 | ||
| | | 34 | ||
| | | [[#FPGA_Registers|UARTB_TXD]] | ||
| CN2_086 | | [[#TS-SOCKET|CN2_086]] | ||
| [[#Crossbar|UART6_TXD]] | |||
|- | |- | ||
| | | 5 | ||
| | | 35 | ||
| | | [[#FPGA_Registers|UARTC_TXD]] | ||
| CN2_094 | | [[#TS-SOCKET|CN2_094]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 36 | ||
| | | [[#FPGA_Registers|UARTD_TXD]] | ||
| CN2_098 | | [[#TS-SOCKET|CN2_098]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 37 | ||
| | | [[#FPGA_Registers|DIO_00]] | ||
| CN1_093 | | [[#TS-SOCKET|CN1_093]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 38 | ||
| | | [[#FPGA_Registers|DIO_01]] | ||
| CN1_091 | | [[#TS-SOCKET|CN1_091]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 39 | ||
| | | [[#FPGA_Registers|DIO_02]] | ||
| CN1_089 | | [[#TS-SOCKET|CN1_089]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 40 | ||
| | | [[#FPGA_Registers|DIO_03]] | ||
| CN1_087 | | [[#TS-SOCKET|CN1_087]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 41 | ||
| | | [[#FPGA_Registers|DIO_04]] | ||
| CN1_085 | | [[#TS-SOCKET|CN1_085]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 42 | ||
| | | [[#FPGA_Registers|DIO_05]] | ||
| CN1_083 | | [[#TS-SOCKET|CN1_083]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 43 | ||
| | | [[#FPGA_Registers|DIO_06]] | ||
| CN1_081 | | [[#TS-SOCKET|CN1_081]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 44 | ||
| | | [[#FPGA_Registers|DIO_07]] | ||
| CN1_079 | | [[#TS-SOCKET|CN1_079]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 45 | ||
| | | [[#FPGA_Registers|DIO_08]] | ||
| CN1_077 | | [[#TS-SOCKET|CN1_077]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 46 | ||
| | | [[#FPGA_Registers|DIO_09]] | ||
| CN1_073 | | [[#TS-SOCKET|CN1_073]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 49 | ||
| | | [[#FPGA_Registers|DIO_12]] | ||
| CN1_067 | | [[#TS-SOCKET|CN1_067]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 50 | ||
| | | [[#FPGA_Registers|DIO_13]] | ||
| CN1_065 | | [[#TS-SOCKET|CN1_065]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 51 | ||
| | | [[#FPGA_Registers|DIO_14]] | ||
| CN1_063 | | [[#TS-SOCKET|CN1_063]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 52 | ||
| | | [[#FPGA_Registers|DIO_15]] | ||
| CN1_061 | | [[#TS-SOCKET|CN1_061]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 53 | ||
| | | [[#FPGA_Registers|DIO_16]] | ||
| CN1_059 | | [[#TS-SOCKET|CN1_059]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 54 | ||
| | | [[#FPGA_Registers|DIO_17]] | ||
| CN1_097 | | [[#TS-SOCKET|CN1_097]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 55 | ||
| | | [[#FPGA_Registers|DIO_18]] | ||
| CN1_099 | | [[#TS-SOCKET|CN1_099]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 56 | ||
| | | [[#FPGA_Registers|DIO_19]] | ||
| CN1_100 | | [[#TS-SOCKET|CN1_100]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 57 | ||
| | | [[#FPGA_Registers|DIO_20]] | ||
| CN1_098 | | [[#TS-SOCKET|CN1_098]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 58 | ||
| | | [[#FPGA_Registers|DIO_21]] | ||
| CN1_096 | | [[#TS-SOCKET|CN1_096]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 59 | ||
| | | [[#FPGA_Registers|DIO_22]] | ||
| CN1_094 | | [[#TS-SOCKET|CN1_094]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 60 | ||
| | | [[#FPGA_Registers|DIO_23]] | ||
| CN1_092 | | [[#TS-SOCKET|CN1_092]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 61 | ||
| | | [[#FPGA_Registers|DIO_24]] | ||
| CN1_090 | | [[#TS-SOCKET|CN1_090]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 62 | ||
| | | [[#FPGA_Registers|DIO_25]] | ||
| CN1_088 | | [[#TS-SOCKET|CN1_088]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 63 | ||
| | | [[#FPGA_Registers|DIO_26]] | ||
| CN1_086 | | [[#TS-SOCKET|CN1_086]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 64 | ||
| | | [[#FPGA_Registers|DIO_27]] | ||
| CN1_084 | | [[#TS-SOCKET|CN1_084]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 65 | ||
| | | [[#FPGA_Registers|DIO_28]] | ||
| CN1_082 | | [[#TS-SOCKET|CN1_082]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 66 | ||
| | | [[#FPGA_Registers|DIO_29]] | ||
| CN1_080 | | [[#TS-SOCKET|CN1_080]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 67 | ||
| | | [[#FPGA_Registers|DIO_30]] | ||
| CN1_078 | | [[#TS-SOCKET|CN1_078]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 68 | ||
| | | [[#FPGA_Registers|DIO_31]] | ||
| CN1_076 | | [[#TS-SOCKET|CN1_076]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 69 | ||
| | | [[#FPGA_Registers|DIO_32]] | ||
| CN1_074 | | [[#TS-SOCKET|CN1_074]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 70 | ||
| | | [[#FPGA_Registers|DIO_33]] | ||
| CN1_072 | | [[#TS-SOCKET|CN1_072]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 71 | ||
| | | [[#FPGA_Registers|DIO_34]] | ||
| CN1_070 | | [[#TS-SOCKET|CN1_070]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 72 | ||
| | | [[#FPGA_Registers|DIO_35]] | ||
| CN1_068 | | [[#TS-SOCKET|CN1_068]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 73 | ||
| | | [[#FPGA_Registers|DIO_36]] | ||
| CN1_066 | | [[#TS-SOCKET|CN1_066]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 74 | ||
| | | [[#FPGA_Registers|DIO_37]] | ||
| CN1_064 | | [[#TS-SOCKET|CN1_064]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 75 | ||
| | | [[#FPGA_Registers|DIO_38]] | ||
| CN1_060 | | [[#TS-SOCKET|CN1_060]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 76 | ||
| | | [[#FPGA_Registers|DIO_39]] | ||
| CN1_058 | | [[#TS-SOCKET|CN1_058]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 78 | ||
| | | [[#FPGA_Registers|DIO_41]] | ||
| CN1_024 | | [[#TS-SOCKET|CN1_024]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 79 | ||
| | | [[#FPGA_Registers|DIO_42]] | ||
| CN1_026 | | [[#TS-SOCKET|CN1_026]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 80 | ||
| | | [[#FPGA_Registers|DIO_43]] | ||
| CN1_019 | | [[#TS-SOCKET|CN1_019]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 81 | ||
| | | [[#FPGA_Registers|DIO_44]] | ||
| CN1_021 | | [[#TS-SOCKET|CN1_021]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 82 | ||
| | | [[#FPGA_Registers|DIO_45]] | ||
| CN1_037 | | [[#TS-SOCKET|CN1_037]] | ||
| [[#Crossbar|GPIO]] | |||
|- | |- | ||
| | | 5 | ||
| | | 83 | ||
| | | [[#FPGA_Registers|DIO_46]] | ||
| CN1_039 | | [[#TS-SOCKET|CN1_039]] | ||
| [[#Crossbar|GPIO]] | |||
|} | |} | ||
<references/> |
Latest revision as of 15:07, 25 June 2019
- ↑ GPIO pins are formatted in "<chip>_<pin>" notation.