TS-7120 FPGA: Revision history

28 March 2019

• curprev 16:5716:57, 28 March 2019‎ Ian talk contribs‎ 4,156 bytes +6‎ No edit summary
• curprev 16:5616:56, 28 March 2019‎ Ian talk contribs‎ 4,150 bytes +6‎ No edit summary

25 March 2019

• curprev 09:2509:25, 25 March 2019‎ Ian talk contribs‎ m 4,144 bytes 0‎ No edit summary

4 March 2019

• curprev 16:1516:15, 4 March 2019‎ Mark talk contribs‎ 4,144 bytes +1‎ →‎FPGA DIO Banks

17 January 2019

• curprev 09:5409:54, 17 January 2019‎ Mark talk contribs‎ 4,143 bytes +86‎ →‎FPGA DIO Banks

16 January 2019

• curprev 16:2616:26, 16 January 2019‎ Mark talk contribs‎ 4,057 bytes 0‎ →‎Syscon
• curprev 16:2616:26, 16 January 2019‎ Mark talk contribs‎ 4,057 bytes +2‎ →‎FPGA DIO Banks
• curprev 13:4013:40, 16 January 2019‎ Mark talk contribs‎ 4,055 bytes +1,063‎ →‎Syscon
• curprev 12:3512:35, 16 January 2019‎ Mark talk contribs‎ 2,992 bytes +344‎ No edit summary

15 January 2019

• curprev 17:3817:38, 15 January 2019‎ Mark talk contribs‎ 2,648 bytes +78‎ →‎Syscon
• curprev 16:5816:58, 15 January 2019‎ Mark talk contribs‎ 2,570 bytes +545‎ →‎Syscon
• curprev 16:4116:41, 15 January 2019‎ Mark talk contribs‎ 2,025 bytes 0‎ →‎Syscon
• curprev 16:4016:40, 15 January 2019‎ Mark talk contribs‎ 2,025 bytes +843‎ →‎Syscon
• curprev 16:1416:14, 15 January 2019‎ Mark talk contribs‎ 1,182 bytes +1‎ →‎Syscon
• curprev 16:1416:14, 15 January 2019‎ Mark talk contribs‎ 1,181 bytes +3‎ →‎Syscon
• curprev 16:1416:14, 15 January 2019‎ Mark talk contribs‎ 1,178 bytes +540‎ No edit summary
• curprev 16:0816:08, 15 January 2019‎ Mark talk contribs‎ 638 bytes +26‎ No edit summary
• curprev 16:0716:07, 15 January 2019‎ Mark talk contribs‎ 612 bytes 0‎ No edit summary
• curprev 15:5315:53, 15 January 2019‎ Mark talk contribs‎ 612 bytes +612‎ Created page with "The TS-7120 FPGA is connected to the CPU over the WEIM bus. This provides 8-bit, 16-bit, or 32-bit access to the FPGA mapped at 0x5000_0000. For example, to read the sysco..."