TS-7250-V3 LCD Header: Difference between revisions

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(Created page with "The LCD header is a 0.1" pitch 2x7 header including GPIO. This is designed around compatibility with the HD44780 LCD controller which includes our [https://www.embeddedarm.co...")
 
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|-
| 1
| 1
| [[#GPIO|GPIO Bank 5 IO 1]]
| [[#Board Rails|5V]]
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|-
| 2
| 2
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|-
|-
| 3
| 3
| [[#GPIO|GPIO Bank 5 IO 2]]
| LCD_RS [[#GPIO|GPIO Bank 2 IO 23]]
|-
|-
| 4
| 4
| [[#GPIO|Current Sink Output Bank 2 IO 27]] <ref>When this pin is a high output it enables a FET to ground.</ref>
| LCD_BIAS [[#PWM|PWM0]] / [[#GPIO|GPIO Bank 2 IO 24]] <ref>This pin is used to dynamically adjust contract on the LCD.  This may need to be tuned depending on the environment or altitude where the display is used.</ref>
|-
|-
| 5
| 5
| [[#GPIO|GPIO Bank 5 IO 3]]
| LCD_EN [[#GPIO|GPIO Bank 5 IO 20]]
|-
| 6
| [[#SPI|spidev 0.1 Chip Select]]
|-
| 7
| [[#GPIO|GPIO Bank 5 IO 4]]
|-
| 8
| [[#GPIO|GPIO Bank 5 IO 5]]
|-
| 9
| [[#GPIO|GPIO Bank 5 IO 6]]
|-
| 10
| [[#SPI|spidev 0.1 MISO]]
|-
| 11
| [[#GPIO|GPIO Bank 5 IO 7]]
|-
| 12
| [[#SPI|spidev 0.1 MOSI]]
|-
| 13
| [[#GPIO|GPIO Bank 5 IO 8]]
|-
| 14
| [[#SPI|spidev 0.1 CLK]]
|-
| 15
| [[#GPIO|GPIO Bank 5 IO 9]]
|-
| 16
| [[#Board Rails|3.3V]]
|}
|}
|  
|  
[[File:TS-7250-V3-DIO Header.svg|302px]]
[[File:TS-7250-V3-LCD Header.svg|302px]]
|}
|}


<References />
<References />

Revision as of 13:31, 27 February 2020

The LCD header is a 0.1" pitch 2x7 header including GPIO. This is designed around compatibility with the HD44780 LCD controller which includes our LCD-LED.

Signals Pin Layout
Pin Signal
1 5V
2 GND
3 LCD_RS GPIO Bank 2 IO 23
4 LCD_BIAS PWM0 / GPIO Bank 2 IO 24 [1]
5 LCD_EN GPIO Bank 5 IO 20

TS-7250-V3-LCD Header.svg

  1. This pin is used to dynamically adjust contract on the LCD. This may need to be tuned depending on the environment or altitude where the display is used.