TS-7800-V2: Difference between revisions
| Line 966: | Line 966: | ||
== LCD Header == | == LCD Header == | ||
This header is laid out to drive our [[LCD-LED]] product. The file tolcd.c in our samples directory demonstrates this. Like the DIO header, pins 7-14 can be driven low, otherwise they tri-state with a 2.2k Ohm pull-up. Pins 4 and 5 are pulled up by 475 Ohm and 51 Ohm inline resistance, respectively. | |||
{| class=wikitable | |||
|+ LCD Header | |||
| GND | |||
| RS | |||
| EN | |||
| DB1 | |||
| DB3 | |||
| DB5 | |||
| DB7 | |||
|- | |||
| 2 | |||
| 4 | |||
| 6 | |||
| 8 | |||
| 10 | |||
| 12 | |||
| 14 | |||
|- | |||
| 1 | |||
| 3 | |||
| 5 | |||
| 7 | |||
| 9 | |||
| 11 | |||
| 13 | |||
|- | |||
| +5V | |||
| BIAS | |||
| RW | |||
| DB0 | |||
| DB2 | |||
| DB4 | |||
| DB6 | |||
|} | |||
== Ethernet Port == | == Ethernet Port == | ||
== SD Connectors == | == SD Connectors == | ||
Revision as of 11:48, 25 May 2017
| WARNING: | This is PRELIMINARY INFORMATION ONLY. It is certain to change while undergoing editing. |
 | |
| Product Page | |
| Product Images | |
| Specifications | |
| Documentation | |
|---|---|
| Schematic | |
| Mechanical Drawing | |
| FTP Path | |
| Processor | |
| Marvell MV88F6820 | |
| Armada 385 ARM Cortex-A9 1.3 GHz Dual Core CPU |
Overview
The TS-7800-V2 is a RoHS compliant Single Board Computer (SBC) based on a Marvell MV88F6820 1.3GHz (1.8GHz optional) Cortex-A9 Dual Core CPU. On-board PCI bus provides a standard set of high-end peripherals such as 10/100/1000 ethernet, dual SATA and dual USB 3.0 ports. The Mini PCI Express connector allows for the connection of off-board mSATA or PCIe cards. The TS-7800-V2 features 1 GB to 2 GB RAM of DDR3 RAM and 4 GB eMMC flash. The TS-7800-V2 also has on-board WiFi, Bluetooth, and an accelerometer.
| Note: | If you are moving from a TS-7800 board to the TS-7800-V2, be sure to read the "Moving from TS-7800 to TS-7800-V2" section at the bottom of the page! |
Getting Started
A Linux PC is recommended for development. For developers who use Windows, virtualized Linux using VMWare or similar are recommended in order to make the full power of Linux available. The developer will need to be comfortable with Linux anyway in order to work with embedded Linux on the target platform. The main reasons that Linux is useful are:
- Linux filesystems on the microSD card can be accessed on the PC.
- More ARM cross-compilers are available.
- If recovery is needed, a bootable medium can be written.
- A network filesystem can be served.
- Builds such as Linux kernel, buildroot, yocto, distro-seed will not work from WSL1/2 on a case insensitive filesystem.
| WARNING: | Be sure to take appropriate Electrostatic Discharge (ESD) precautions. Disconnect the power source before moving, cabling, or performing any set up procedures. Inappropriate handling may cause damage to the board. |
Getting Console and Powering up
Set the "EN Con" jumper, and use a null modem cable to connect the board's DB-9 connector to your workstation's COM port. Alternatively, connect a micro USB Type B cable to CN12, with the other end going to a USB port on a workstation.
DB9 The DB9 console port comprises of RS232 serial communication at 115200 baud, no parity, 8 data bits, 1 stop bit, no handshaking, no flow control.
Micro USB The Micro USB type B port hosts a USB virtual serial port on the managing microcontroller. Some users may require the OS-appropriate driver provided by SiLabs found here: https://www.silabs.com/products/development-tools/software/usb-to-uart-bridge-vcp-drivers The TS-7800-V2 will respond over the virtual serial port at 115200 baud, no parity, 8 data bits, 1 stop bit, no handshake.
| Note: | Some terminal software will default to software flow control XON/XOFF. This setting is not compatible with the TS-7800-V2. Be sure to turn off both hardware flow control and software flow control (sometimes called "handshake") when configuring the console interface for the TS-7800-V2. |
Console from Linux
There are many serial clients for Linux, but 3 simple ones would be picocom, screen, and minicom. These examples assume that your COM device is /dev/ttyUSB0 (common for USB adapters), but replace them with the COM device on your workstation.
Linux has a few applications capable of connecting to the board over serial. You can use any of these clients that may be installed or available in your workstation's package manager:
Picocom is a very small and simple client.
picocom -b 115200 /dev/ttyUSB0
Screen is a terminal multiplexer which happens to have serial support.
screen /dev/ttyUSB0 115200
Or a very commonly used client is minicom which is quite powerful:
minicom -s
- Navigate to 'serial port setup'
- Type "a" and change location of serial device to '/dev/ttyUSB0' then hit "enter"
- If needed, modify the settings to match this and hit "esc" when done:
E - Bps/Par/Bits : 115200 8N1
F - Hardware Flow Control : No
G - Software Flow Control : No
- Navigate to 'Save setup as dfl', hit "enter", and then "esc"
Console from Windows
Putty is a small simple client available for download here. Open up Device Manager to determine your console port. See the putty configuration image for more details.
The TS-7800-V2 receives power through the +5VDC power connector with a 1A minimum supply. Once power is applied, the device will output information via the console. The first output is from U-Boot:[1]
BootROM - 1.73
Booting from MMC
General initialization - Version: 1.0.0
AVS selection from EFUSE disabled (Skip reading EFUSE values)
Overriding default AVS value to: 0x23
Detected Device ID 6820
High speed PHY - Version: 2.0
Init Customer board board SerDes lanes topology details:
| Lane # | Speed| Type |
------------------------------|
| 0 | 3 | SATA0 |
| 1 | 5 | USB3 HOST0 |
| 2 | 3 | SATA1 |
| 3 | 5 | USB3 HOST1 |
| 5 | 5 | PCIe2 |
-------------------------------
mvSysEnvReadPcieGenSetting: TWSI Read of SatR field 'isForceGen1 failed
:** Link is Gen1, check the EP capability
PCIe, Idx 2: remains Gen1
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver TIP-1.54.0
DDR3 Training Sequence - Switching XBAR Window to FastPath Window
DDR3 Training Sequence - Ended Successfully
BootROM: Image checksum verification PASSED
__ __ _ _
| \/ | __ _ _ ____ _____| | |
| |\/| |/ _` | '__\ \ / / _ \ | |
| | | | (_| | | \ V / __/ | |
|_| |_|\__,_|_| \_/ \___|_|_|
_ _ ____ _
| | | | | __ ) ___ ___ | |_
| | | |___| _ \ / _ \ / _ \| __|
| |_| |___| |_) | (_) | (_) | |_
\___/ |____/ \___/ \___/ \__|
** LOADER **
U-Boot 2013.01 (May 01 2017 - 14:41:41) Marvell version: 2016_T1.0.eng_drop_v2
mvBoardIoExpanderDataSet: Write IO expander (addr=0x20, offset=2, value=0x40 tol
Board: Technologic Systems TS-7800v2
SoC: MV88F6820 Rev A0
running 2 CPUs
CPU: ARM Cortex A9 MPCore (Rev 1) LE
CPU 0
CPU @ 1066 [MHz]
L2 @ 533 [MHz]
TClock @ 250 [MHz]
DDR3 @ 533 [MHz]
DDR3 32 Bit Width,FastPath Memory Access, DLB Enabled, ECC Disabled
DRAM: 1 GiB
MMC: mv_sdh: 0
sdhci_transfer_data: Error detected in status(0x408000)!
*** Warning - bad CRC, using default environment
PCI-e 2 (IF 0 - bus 1) Root Complex Interface, Detected Link X1, GEN 1.1
USB2.0 0: Host Mode
USB3.0 0: Host Mode
USB3.0 1: Host Mode
Map: Code: 0x3fee4000:0x3ff97500
BSS: 0x3ffef754
Stack: 0x3f963f20
Heap: 0x3f964000:0x3fee4000
U-Boot Environment: 0x00100200:0x00180200 (MMC)
Board configuration detected:
Net:
| port | Interface | PHY address |
|--------|-----------|--------------|
| egiga0 | RGMII | 0x01 |
egiga0 [PRIME]
Hit any key to stop autoboot: 0
The "SD Boot" jumper, when set, will cause U-Boot to boot to SD, and when unset, U-Boot will boot to eMMC.
| Note: | The "*** Warning - bad CRC, using default environment" can be safely ignored. This indicates that u-boot scripts are not being customized. Typing "env save" will hide these messages, but this is not needed. |
U-Boot Environment
The U-Boot environment on the TS-7800-V2 is stored in the on-board eMMC flash.
# Print all environment variables
env print -a
# Sets the variable bootdelay to 5 seconds
env set bootdelay 5;
# Variables can also contain commands
env set hellocmd 'led red on; echo Hello world; led green on;'
# Execute commands saved in a variable
env run hellocmd;
# Commit env changes to the spi flash
# Otherwise changes are lost
env save
# Restore env to default
env default -a
# Remove a variable
env delete emmcboot
U-Boot Commands
# The most important command is
help
# This can also be used to see more information on a specific command
help i2c
# Boots into the compressed binary at $loadaddr.
bootz
# Boots into the compressed binary at $loadaddr, specifies the fdtaddr
# so Linux knows where to find the board device-tree
bootz ${loadaddr} - ${fdtaddr}
# Get a DHCP address
dhcp
# This sets ${ipaddr}, ${dnsip}, ${gatewayip}, ${netmask}
# and ${ip_dyn} which can be used to check if the dhcp was successful
# These commands are used for scripting:
false # do nothing, unsuccessfully
true # do nothing, successfully
# This command lets you set fuses in the processor
# Setting fuses can brick your board, will void your warranty,
# and should not be done in most cases
fuse
# This command is used to copy a file from most devices
# Load kernel from SD
ext4load mmc 1:2 ${loadaddr} /boot/zImage
# Load Kernel from eMMC
ext4load mmc 0:2 ${loadaddr} /boot/zImage
# You can view the fdt from u-boot with fdt
ext4load mmc 0:2 $fdtaddr /boot/armada-38x.dtb
fdt addr ${fdtaddr}
fdt print
# You can blindly jump into any memory
# This is similar to bootm, but it does not use the
# u-boot header
ext4load mmc 0:2 ${loadaddr} /boot/custombinary
go ${loadaddr}
# Browse fat,ext2,ext3,or ext4 filesystems:
ext4ls mmc 0:1 /
# Access memory like devmem in Linux, you can read/write arbitrary memory
# using mw and md
# write
mw 0x10000000 0xc0ffee00 1
# read
md 0x10000000 1
# Test memory.
mtest
# Check for new SD card
mmc rescan
# Read SD card size
mmc dev 1
mmcinfo
# Read eMMC Size
mmc dev 0
mmcinfo
# The NFS command is like 'load', but used over the network
dhcp
env set serverip 192.168.0.11
nfs ${loadaddr} 192.168.0.11:/path/to/somefile
# Test ICMP
dhcp
ping 192.168.0.11
# Reboot
reset
# Delay in seconds
sleep 10
# You can load HUSH scripts that have been created with mkimage
ext4load mmc 0:1 ${loadaddr} /boot/ubootscript
source ${loadaddr}
# Most commands have return values that can be used to test
# success, and HUSH scripting supports comparisons like
# test in Bash, but much more minimal
if load mmc 1:1 ${fdtaddr} /boot/uImage;
then echo Loaded Kernel
else
echo Could not find kernel
fi
# Commands can be timed with "time"
time bdinfo
# Print U-boot version/build information
version
Busybox / Fastboot
After the TS-7800-V2 is first booted you will be at this shell:
Finished booting in 3.1 seconds Type 'tshelp' for help / #
This is a busybox shell which presents you with a very minimalistic system. This filesystem is loaded into memory, so none of the changes will be saved unless you type 'save', or mount a filesystem as read write. This can also provide a simple mechanism for running your application in an entirely read only environment. The linuxrc script will be the first thing executed as soon as the kernel is loaded. This sets the default IP address, starts the userspace ctl applications, and more. Read the linuxrc for more information.
While busybox itself doesn't contain much functionality, it does mount the Debian partition under /mnt/root/. It will also add common paths and load libraries from the Debian system. Many of the Debian applications will work by default. If an application relies on certain paths being in certain places, or running services, you should instead boot to Debian to run them.
This shell when started on the COM port is what is blocking a Debian boot. If you close it by typing 'exit', the boot process will continue. If you are connected through telnet, this will instead open up its own instance of the shell so typing 'exit' will only end that session. You would have to relink the linuxrc script to always boot to a specific partition from telnet. When logging into Debian, the default user is 'root' with no password. Technologic Systems strongly recommends setting a secure password for your system root account.
The compiled instance of busybox includes internal commands listed below:
/ # /bin/busybox --help
BusyBox v1.24.1 (2017-05-02 11:36:21 PDT) multi-call binary.
BusyBox is copyrighted by many authors between 1998-2015.
Licensed under GPLv2. See source distribution for detailed
copyright notices.
Usage: busybox [function [arguments]...]
or: busybox --list
or: function [arguments]...
BusyBox is a multi-call binary that combines many common Unix
utilities into a single executable. Most people will create a
link to busybox for each function they wish to use and BusyBox
will act like whatever it was invoked as.
Currently defined functions:
[, [[, acpid, ash, base64, basename, beep, blkid, blockdev, bootchartd,
brctl, bzip2, cal, cat, catv, chat, chgrp, chmod, chown, chroot, cksum,
clear, comm, conspy, cp, cttyhack, cut, date, dd, depmod, devmem, df,
dhcprelay, dirname, dmesg, dnsdomainname, du, dumpleases, echo, egrep,
env, expr, false, fatattr, fbsplash, fdisk, fgconsole, fgrep, find,
findfs, flock, free, fstrim, fsync, ftpd, getopt, getty, grep, groups,
gunzip, halt, hd, head, hexdump, hostname, id, ifconfig, ifenslave,
ifplugd, init, insmod, iostat, kbd_mode, kill, killall, linuxrc, ln,
login, lpd, lpq, lpr, ls, lsmod, lsof, lspci, lsusb, lzop, lzopcat,
makemime, man, md5sum, mdev, microcom, mkdir, mkdosfs, mke2fs, mkfifo,
mkfs.ext2, mkfs.vfat, mknod, modinfo, modprobe, more, mount, mpstat,
mv, mvtime, nbd-client, netstat, nice, nohup, nslookup, ntpd, pgrep,
ping, ping6, pivot_root, pkill, pmap, popmaildir, poweroff, powertop,
printenv, printf, ps, pscan, pstree, pwd, pwdx, rdev, readahead,
reboot, reformime, rev, rm, rmdir, rmmod, route, rtcwake, rx, script,
scriptreplay, sed, sendmail, setconsole, setfont, setlogcons,
setserial, setsid, sh, sha1sum, sha256sum, sha3sum, sha512sum, showkey,
shuf, sleep, smemcap, split, stat, stty, sum, sync, tac, tail, tar,
tee, telnetd, test, tftp, tftpd, time, timeout, top, tr, traceroute,
traceroute6, true, truncate, tty, tunctl, udhcpc, udhcpd, uevent,
umount, uname, unlink, unlzop, unxz, unzip, uptime, usleep, uudecode,
uuencode, vi, volname, wget, whois, xargs, xz, xzcat, zcat
| Note: | You may want to refer to the sources for some of these commands if they are not behaving as you would expect. Busybox implements them so they are incredibly small, but they don't always provide all of the functionality as is in the standard gnu/bash shell commands. Some commands will provide the same functionality like date, but may only work with very specific formats. |
First Linux Boot
U-Boot is always loaded from the onboard eMMC flash. U-Boot has the ability to boot Linux, Android, QNX, or other operating systems on the SD or eMMC. The eMMC and SD cards shipped with the unit are pre-programmed with our Debian Jessie image. See other OS sections for information on the various OS options that we provide.
Jumper Configuration
| Jumper | Function |
|---|---|
| SD Boot | Boot to SD (Otherwise eMMC) |
| EN Console | Enables the console |
| U Boot | TBD |
Backup / Restore
SD Card
TBD
Onboard Flash
TBD
System Configuration
For development it is recommended to go boot to the full Debian where there is plenty of space for development work. Debian provides many more packages and a much more familiar environment for users already versed in Debian. Once here you can use apt-get to install/remove packages, configure the network, and perform other common tasks.
Configuring the network
From almost any Linux system you can use "ip" or the ifconfig/route commands to initially set up the network. To configure the network interface manually you can use the same set of commands in the initrd or Debian.
# Bring up the CPU network interface
ifconfig eth0 up
# Set an ip address (assumes 255.255.255.0 subnet mask)
ifconfig eth0 192.168.0.50
# Set a specific subnet
ifconfig eth0 192.168.0.50 netmask 255.255.0.0
# Configure your route. The router (or gateway) is the device that allows network packets from your board to reach computers that are not on your local subnet, as well as to the internet.
route add default gw 192.168.0.1
# Edit /etc/resolv.conf for your DNS server
echo "nameserver 192.168.0.1" > /etc/resolv.conf
Many networks will offer DHCP which can be set up with one command:
Configure DHCP in Debian:
# To setup the default CPU ethernet port
pump -i eth0
# Or if you're on a baseboard with a second ethernet port, you can use that as:
pump -i eth1
Configure DHCP in the initrd:
udhcpc -i eth0
# Or if you're on a baseboard with a second ethernet port, you can use that as:
udhcpc -i eth1
To make your network settings take effect on startup in Debian, edit /etc/network/interfaces:
# Used by ifup(8) and ifdown(8). See the interfaces(5) manpage or
# /usr/share/doc/ifupdown/examples for more information.
# We always want the loopback interface.
#
auto lo
iface lo inet loopback
auto eth0
iface eth0 inet static
address 192.168.0.50
netmask 255.255.255.0
gateway 192.168.0.1
auto eth1
iface eth1 inet dhcp
In this example eth0 is a static configuration and eth1 receives its configuration from the DHCP server. For more information on network configuration in Debian see their documentation here.
To make your changes permanent in the initrd you will need to edit the linuxrc script. Use the same commands you would use to manually configure it and place them over the current ifconfig calls.
Network Troubleshooting
One common error you might encounter is after changing to use linuxrc-sdroot, you might notice the Ethernet network interface fails to come up. The error will present itself during Debian's boot with several errors beginning in SIOCSIF. This is because udev is trying to assign eth0 to a MAC address that isn't present on your SBC. The fix is simple enough, edit or (re)move the configuration file telling udev to do something silly. Try this from Debian:
mv /etc/udev/rules.d/70-persistent-net.rules /etc/udev/rules.d/70-persistent-net.rules.old
Run sync and reboot. Now your preferences in /etc/network/interfaces will take effect.
Installing New Software
TBD
Setting Up SSH
TBD
Starting Automatically
TBD
Software Development
TBD
Linux Kernel
TBD
Compiling The Kernel
Features
CPU Functionality
MMU
The 88F6020 features a Memory Management Unit, enabling high level operating systems such as Embedded Linux and Windows CE to run on the TS-7800-V2. In the same way, the Linux TS-Kernel takes advantage of the MMU functionality. The MMU is controlled by page tables stored in system memory and is responsible for virtual address to physical address translation, memory protection through access permissions and domains, MMU cache and write buffer access. In doing so, software applications can access larger "virtual" memory space than the available physical memory size, allowing multiple programs to run and use the system memory simultaneously.
Interrupts
The 88F6020 has 192 interrupts available on chip as well as another TBD implemented in the Lattice FPGA by using the doorbell interrupt register (???).
TBD
For more information about the interrupt functionalities, refer to the 88F6020 User's Guide.
Onboard eMMC Flash
The TS-7800-V2 has 4 GB of eMMC flash installed as standard.
TBD
USB Host
The USB Connector on the TS-7800-V2 provide two USB 3.0 interfaces for the user. These are directly connected to the MV88F6020 processor, which integrates a USB dual-port Extensible Host Controller Interface (xHCI), providing serial communications ports at a baud rate of up to 5 Gbit/s ("SuperSpeed"). The MV88F6020 also has a USB 2.0 controller, with Enhanced Host Controller Interface (EHCI) for full compatibility with USB 2.0 at speeds up to 480 Mbits/sec ("High-Speed").
Additional non-volatile storage may be added with a USB flash drive. This device supplies additional non-volatile storage either for data or for a complete operation system distribution, such as Debian. A tar-file of Debian is available on the Technologic Systems FTP site.
SATA
The TS-7800-V2 provides up to two SATA 3.0 ports. These allow connection of mass storage devices in excess of [some very large number goes here], at data rates of up to 6 Gbits/sec.
DDR3 RAM
The TS-7800-V2 comes with 1 GB of DDR3 as standard, with 2 GB as an option.
FPGA Functionality
The 20,000 LUT Altera Cyclone IV FPGA is an integral part of the TS-7800-V2 design. After an operating system has booted, the FPGA provides the CPU access to the PC/104 connector. 89 PC/104 pins are connected to the FPGA. The default FPGA load allows these pins to be used either as a standard PC/104 bus or for GPIO. Due to the flexibility of FPGAs, many other functionalities are possible such as quadrature encoders, PWM outputs, extra serial ports, DMX, or other unique communications protocols. Please contact Technologic Systems if you require custom FPGA logic.
The default FPGA has several cores available at 0xe8000000 as a 32-bit bus. Most of these are abstracted by existing drivers or utilities.
| Offset | Description |
|---|---|
| 0x00-0xff | Syscon and TSUARTs |
| 0x100-0x1ff | SD card controller |
| 0x200-0x2ff | IRQ controller |
| 0x400-0x4ff | DMA channel interface |
| 0x800-0x8ff | NAND controller |
FPGA Changelog
Syscon
By default the Lattice FPGA on the TS-7800-V2 is loaded with a system controller core at base physical address 0xe8000000. Add that base to the offsets below to access these registers. With the exception of the UART control registers, these registers are all 32 bits wide and should therefore be accessed with 32 bit writes. The UART registers are 16 bit registers.
| Offset | Bits | Access | Description |
|---|---|---|---|
| 0x0 | 7-0 | Read Only | FPGA Revision |
| 31-8 | Read Only | Board ID: 0xb480 | |
| 0x4 | 15-0 | Read/Write | DIO header data in pins 16-1 |
| 29-16 | Read/Write | LCD header data in pins 14-1 | |
| 30 | Read Only | JP1 status (1 = on) | |
| 31 | Read Only | JP2 status (1 = on) | |
| 0x8 | 15:0 | Read/Write | DIO Header Data Output (pin 1:16) |
| 29:16 | Read/Write | LCD header Data Output (pin 1:14) | |
| 30 | Read/Write | Green LED (1 is on) | |
| 31 | Read/Write | Temperature Sensor chipselect (1 selected) | |
| 0xc | 12-0 | Read/Write | PC104 Configuration |
| 13 | Read/Write | UART RTS for COM1 | |
| 14 | Read/Write | UART DTR for COM1 | |
| 15 | Read/Write | 1 = RS422 on COM2 using TSUART2
0 = dual RS485 using TSUART2 and TSUART3 | |
| 16 | Read/Write | UART4 RTS on COM3 | |
| 31-17 | Read Only | Reserved | |
| 0x10 | 31-0 | Read/Write | PC104 row A GPIO data |
| 0x14 | 31-0 | Read/Write | PC104 row B GPIO data |
| 0x18 | 19-0 | Read/Write | PC104 row C GPIO data |
| 31-20 | Read Only | Reserved | |
| 0x20 | 31-0 | Read/Write | PC104 row A GPIO data direction |
| 0x24 | 31-0 | Read/Write | PC104 row B GPIO data direction |
| 0x28 | 19-0 | Read/Write | PC104 row C GPIO data direction |
| 31-20 | Read Only | Reserved | |
| 0x2c | 19-0 | Reda/Write | PC104 row D GPIO data direction |
| 31-20 | Read Only | Reserved | |
| 0x30 | 31-0 | Read/Write | PC104 row A MUX function |
| 0x34 | 31-0 | Read/Write | PC104 row B MUX function |
| 0x38 | 19-0 | Read/Write | PC104 row C MUX function |
| 31-20 | Read Only | Reserved | |
| 0x3c | 19-0 | Read/Write | PC104 row D MUX function |
| 31-20 | Read Only | Reserved | |
| 0x40 | 31-0 | Read Only | Free running microsecond counter |
| 0x44 | 31-0 | Read Only | 32 bits of random data updated every second |
| 0xC0-0xE6 | 15-0 | Read/Write | TSUART control registers |
TSUART
The TS-UART design used in the TS-7800-V2 is fundamentally the same as the TS-UARTs in other TS boards. The TS-UART is a compact, two register design created to require minimal space in an FPGA. The two registers are STAT and DATA. The layout of the STAT register is:
| Bits | Access | Name | Description | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 0 | Read Only | TBRE | Transmit buffer not full | ||||||||||||||||||
| 1 | Read Only | DR | Receive data ready | ||||||||||||||||||
| 2 | Read Only | OERR | Receive overflow | ||||||||||||||||||
| 3 | Read Only | CTS | UART CTS | ||||||||||||||||||
| 4 | Read/Write | RTS | UART RTS | ||||||||||||||||||
| 7:5 | Read/Write | BAUD |
| ||||||||||||||||||
| 8 | Read/Write | NINEBIT | Enable 9-bit mode | ||||||||||||||||||
| 9 | Read Only | RBREAK | BREAK detected | ||||||||||||||||||
| 10 | Read/Write | TBREAK | Transmit Break | ||||||||||||||||||
| 11 | Read Only | DMXS | Reserved | ||||||||||||||||||
| 12 | Read Only | TRE | Transmitter empty | ||||||||||||||||||
| 13 | N/A | SLOW | Reserved | ||||||||||||||||||
| 15:14 | N/A | N/A | Reserved |
Please consult the driver source code files tsuart1.c and tsuart-7800.c provided in the kernel sources for more information on implementing a device driver for the TS-UART on the TS-7800.
PC104
To access peripherals on the PC104 bus it is necessary to add the base address from the table below to the offset of the peripheral to get a memory address for accessing the peripheral. For example, for ISA 8-bit I/O address 0x100, add 0xEE000000 to 0x100 to get 0xEE000100.
| Memory | I/O | |
|---|---|---|
| 8-bit | 0xEC000000 | 0xEE000000 |
| 16-bit | 0xED000000 | 0xEF000000 |
IRQs 5, 6, and 7 on the PC104 bus from the TS-7800-V2 are 64 + the PC104 IRQ number. These will be IRQs 69, 70, and 71.
| WARNING: | The Ethernet connector near the PC/104 bus is near the edge of the PC/104 specification. It is advised to apply a piece of electrical tape on top of the ethernet connector when using a PC/104 daughter board to help prevent any damage. |
The TS-7800-V2 provides control over some of the ISA parameters of the PC-104 bus through a 32-bit register located at address 0xE800000C, which is defined as follows:
| Bit(s) | Function | ||||||
|---|---|---|---|---|---|---|---|
| 5-0 | ISA strobe length | ||||||
| 9-6 | ISA setup length | ||||||
| 10 | Honor ISA 0WS/ENDX signal (1=true) | ||||||
| 11 | TS special ISA pinout enable (1=true) | ||||||
| 12 | ISA oscillator select
|
(Other bits in this register should be masked out.)
The ISA strobe length and ISA setup length are both given as the number of extra 10ns periods.
The ISA strobe length is the amount of additional time that ISA_IOR, ISA_IOW, ISA_MEMR, and ISA_MEMW are held asserted. The minimum (when bits are zero) is 20ns. The default power-on value is 40, for a 420ns strobe length. If configured to honor the ISA 0WS/ENDX signal, the peripheral will skip the remaining strobe time for an early transaction end, allowing for faster devices than standard ISA allows.
The ISA setup length is the additional amount of time above 20ns that the address and data are held stable before asserting the strobe. The default is 14 (160ns).
There is an additional 20ns hold time at the end of the strobe where address and data are kept valid. The default total bus cycle length is then 160ns (setup) plus 420ns (strobe) plus 20ns (hold) for a total of 500ns (2Mhz). This is very conservative for modern hardware and most designs can actually run much faster.
The TS special ISA pinout is designed to enable compatibility with products from TS that use the 16-bit bus on the 64-pin PC/104 header. For example the TS-ETH2 is a 16-bit peripheral that has a jumper labeled "ARM." When this jumper is shorted it will expect to use the TS special ISA pinout, if it is left open it will expect to use standard PC/104 16-bit pinout. Please note that disabling the special pinout is generally not required as both 8 and 16-bit bus cycles will still function normally when it is enabled. Disabling the special ISA mode will result in quirky behavior that may show double read strobes.
PC104 GPIO
The PC-104 connector can be multiplexed between PC-104 functionality and GPIO functionality. There are up to 89 general purpose digital I/O pins available. This corresponds to 104 pins total minus fifteen pins carrying power or ground rails.
Each GPIO pin has a two corresponding register bits, one in the GPIO data register, and one in the GPIO direction register. The direction register determines if the pin is an output (actively driven) or an input (tri-stated, driven externally). A high ("1") value sets a particular pin to be an output, while a low ("0") value sets it to be an input. The data register, when read, contains the current state of all pins in GPIO mode. When written, the value written will determine the state of all pins in GPIO mode, but only for pins which have their direction set to "output".
The GPIO register map is as follows:
| Address | Row | Register |
|---|---|---|
| 0xE8000010 | A | Data |
| 0xE8000014 | B | Data |
| 0xE8000018 | C | Data |
| 0xE800001C | D | Data |
| 0xE8000020 | A | Direction |
| 0xE8000024 | B | Direction |
| 0xE8000028 | C | Direction |
| 0xE800002C | D | Direction |
A simple command-line example to toggle pins on Row A is thus:
#connect an LED from ground (cathode) to Row A pin 2 (andode).
#set row A to all GPIO mode
peekpoke 32 0xe8000030 0x0
#set row A to all output:
peekpoke 32 0xe8000020 0xffffffff
#turn on the pin we attached an LED to with 0b000000010
peekpoke 32 0xe8000010 0x2
#turn off the pin
peekpoke 32 0xe8000010 0x0
#... or turn on the whole row:
peekpoke 32 0xe8000010 0xffffffff
Row A is the row nearest the edge of the board on the longer PC104 socket. Pin 1 is at the end nearest the DB9 connector. From outside (nearest to the edge of the board) to inside (closest to the center of the board) the pin row labels are D, C, A, B. For more pin descriptions and positions, see the table below in section 6.11.
PC104 16550
Many of our PC104 peripherals interface with the TS-7800 using a 16550 UART. To connect to these devices we provide a generic driver. In this example, I'm using a TS-SER4 with jumpers IRQ2 and IRQ4 on.
pc104on
modprobe ts7800_isa16550 irq=6 io=0x3e8
# On the TS-SER4, we have multiple 16550 devices. To use
# these, you must remove the module and reinsert it with the
# options for the next port. This will not remove the /dev/ entry for the original
# device, and to actually remove it you must reboot the board.
rmmod ts7800_isa16550
modprobe ts7800_isa16550 irq=6 io=0x2e8
After loading each driver, dmesg will indicate the new device name:
serial8250: **ttyS2** at MMIO 0xee0003e8 (irq = 70) is a 16550A
Serial Ports
Realtime Clock
The TS-7800-V2 uses the Realtime Clock on the Marvell 88F6820. Linux supports this RTC with the armada38x-rtc driver.
Temperature Sensor
WiFi
The TS-7800-V2 offers optional WiFi (and Bluetooth) using an ATWILC3000-MR110CA IEEE 802.11 b/g/n Link Controller Module With Integrated Bluetooth® 4.0. Linux provides support for this module using the wilc3000 driver.
Summary features:
- IEEE 802.11 b/g/n RF/PHY/MAC SOC
- IEEE 802.11 b/g/n (1x1) for up to 72 Mbps PHY rate
- Single spatial stream in 2.4GHz ISM band
- Integrated PA and T/R Switch Integrated Chip Antenna
- Superior Sensitivity and Range via advanced PHY signal processing
- Advanced Equalization and Channel Estimation
- Advanced Carrier and Timing Synchronization
- Wi-Fi Direct and Soft-AP support
- Supports IEEE 802.11 WEP, WPA, and WPA2 Security
- Supports China WAPI security
- Operating temperature range of -40°C to +85°C
Bluetooth
Accelerometer
The TS-7800-V2 offers optional 9-axis MotionTracking, using an InvenSense MPU-9250 Gyro/Accelerometer/Compass device.
Status LEDs
Cooling Fan
External Interfaces
DIO Header
Access to the DIO header is described here. These pins can be driven low, otherwise they are inputs with pull-up resistors. The pull-ups are via 2.2k Ohms on the odd numbered pins 1-15. Pin 10 has a 10k pull-up and is a read-only input. The rest are pulled up by the FPGA through 20k-150k nominal resistance. The pinout for the DIO header is shown below.
There is no built-in SPI bus on the TS-7800-V2, but SPI is easily implemented in software as demonstrated in our TBD sample code.
| GND | DIO_04 | SPI_FRAME | DIO_08 | SPI_MISO | SPI_MOSI | SPI_CLK | 3.3V |
| 2 | 4 | 6 | 8 | 10(RO) | 12 | 14 | 16 |
| 1 | 3 | 5 | 7 | 9 | 11 | 13 | 15 |
| DIO_01 | DIO_03 | DIO_05 | DIO_07 | DIO_09 | DIO_11 | DIO_13 | DIO_15 |
LCD Header
This header is laid out to drive our LCD-LED product. The file tolcd.c in our samples directory demonstrates this. Like the DIO header, pins 7-14 can be driven low, otherwise they tri-state with a 2.2k Ohm pull-up. Pins 4 and 5 are pulled up by 475 Ohm and 51 Ohm inline resistance, respectively.
| GND | RS | EN | DB1 | DB3 | DB5 | DB7 |
| 2 | 4 | 6 | 8 | 10 | 12 | 14 |
| 1 | 3 | 5 | 7 | 9 | 11 | 13 |
| +5V | BIAS | RW | DB0 | DB2 | DB4 | DB6 |
Ethernet Port
SD Connectors
Mini PCI Express Connector
Power Supply Connector
DB9 Connector
USB Host Connector
Micro USB Connector
COM2 Header
COM3 Header
A/D Header
JTAG Connectors
FPGA JTAG
CPU JTAG
PC104 Header
Moving from TS-7800 to TS-7800-V2
The TS-7800-V2 has been designed to be as backward-compatible with the TS-7800 as possible. However, there are some caveats you should be aware of.
Most important caveat: You can't take the SD card from a TS-7800, plug it into a TS-7800-V2, and expect it to boot; it won't. The kernel and hardware are simply too different. What you should do is copy your application executables from the old SD card onto the SD card that was supplied with the board (or onto the onboard eMMC flash. Instructions on how to do this will be detailed below (TBD).
The TS-7800-V2 should be 100% binary-compatible with user-space applications that were created for the earlier product, and these should run unchanged on the TS-7800-V2.
Other significant differences are discussed next:
CPU: The TS-7800 uses a Marvell Feroceon MV88F5182 single-core CPU running at 500MHz. The TS-7800-V2 uses a Marvell Armada 385 88F6820 dual-core CPU running at 1.3 GHz (1.8 GHz, Commercial Temp Optional). Naturally, this should result in a significant performance increase. The 88F6820 also supports 1 MB of L2 cache (shared between the cores). The additional performance of the TS-7800-V2 should not cause any problems for your application, as long as your code doesn't use simple software loops as a timing reference; such loops will run many times faster than they did on the TS-7800. Also, a single task, single thread application will not get the full benefit from the second CPU core, so you might consider modifying your code accordingly.
RAM: The TS-7800 has 128 MB of DDR1 RAM, while the TS-7800-V2 has 1 GB (2 GB optional) of DDR3 RAM.
Flash: The TS-7800 has 512 MB of on-board NAND flash, while the TS-7800-V2 has either 2 GB of SLC eMMC or 4 GB of MLC eMMC.
Microcontroller: The TS-7800 uses an ATMega48 AVR RISC-based microcontroller to perform various ancillary tasks on the board, such as Analog-to-digital conversion. The TS-7800-V2 uses a SiLabs C8051F381 to do the same job. The ts7800ctl utility provided allows access to these functions, as before.
Mini PCI Express Bus: This is new for the TS-7800-V2, and allows for the connection of mSATA or PCIe Cards to the board.
Kernel: The TS-7800 shipped with Linux 2.6. The TS-7800-V2 ships with Linux 4.4. If you have written custom drivers for the earlier kernel, you will need to recompile them (and very likely make changes to them) for the later kernel.
Temperature Sensor: The TS-7800 used a Texas Instruments TMP124 temperature sense chip, with SPI interface to the CPU. The TS-7800-V2 uses the temperature sensor in the SiLabs microcontroller. If you have applications that interface directly with the TMP124, they will need to be modified. The ts7800ctl utility supplied on the TS-7800-V2, however, will work the same way as before. Alternatively, if you have the optional Invensense MPU-9250 accelerometer on your TS-7800-V2, you may choose to use the temperature sensor that is on that chip. This device has an I2C interface to the CPU.
References
- ↑ The TS-7800-V2 uses the U-Boot system loader, while the TS-7800 used a proprietary loader. The text output from each is significantly different.