TS-7970 DIO Table: Difference between revisions

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| GPIO
| GPIO
| [[#HD2|HD2 pin 3]]
| [[#HD2|HD2 pin 3]]
|-
| EIM_OE
| EIM_OE
| 57
| 57

Revision as of 15:59, 26 June 2015

The GPIO numbers in the table below are relevant to how the Linux references these numbers. The CPU documentation refers to bank and IO while Linux flattens this out to one number space.

Pins #224 and above are from the perspective of the FPGA rather than the CPU. For example, toggling the IO #224 is ttymxc2_rxd which does not toggle the cpu's uart pin, but the FPGA IO directed at that pin in the CPU. Many of these UART pins are not set as GPIO by default, and the FPGA includes its own crossbar. The UART pins will be mapped to cpu or fpga uarts.

CPU PAD [1] GPIO Number Common Functions [2] Location
SD4_DAT3 43 USB HUB Reset# Onboard
DISP0_DAT23 145 SEL_DC_USB# Onboard
EIM_A16 54 EN_USB_5V Onboard
EIM_D27 91 Green LED Onboard
GPIO_2 2 Red LED Onboard
GPIO_9 9 Yellow LED Onboard
DISP0_DAT4 121 Blue LED Onboard
CSI0_DATA_EN 148 FPGA_IRQ_0 (FPGA UART irq) Onboard
GPIO_4 4 FPGA_IRQ_1 (unused) Onboard
DISP0_DAT14 136 JTAG_FPGA_TMS Onboard
DISP0_DAT17 139 JTAG_FPGA_TCK Onboard
DISP0_DAT18 140 JTAG_FPGA_TDO Onboard
DISP0_DAT22 144 JTAG_FPGA_TDI Onboard
DISP0_DAT20 142 Gyro IRQ Onboard
EIM_LBA 59 GPIO HD2 pin 3
EIM_OE 57 Modbus fault Onboard
EIM_RW 58 SD Boot Jumper Onboard
EIM_A19 51 EN_MODBUS_24V# Onboard
DISP0_DAT5 122 EN_MODBUS_3V# Onboard
EIM_D23 87 EN_RTC_PWR Onboard
DISP0_DAT0 117 EN_CAN_1# Onboard
EIM_BCLK 191 EN_CAN_2# Onboard
DISP0_DAT7 124 GPIO HD1 pin 7
DISP0_DAT9 126 GPIO HD1 pin 21
DISP0_DAT10 127 GPIO HD1 pin 9
DISP0_DAT11 133 GPIO HD1 pin 14
EIM_CS0 55 GPIO HD2 pin 5
EIM_A24 132 GPIO HD2 pin 12
EIM_WAIT 128 GPIO HD2 pin 11
EIM_DA0 64 GPIO HD2 pin 2
EIM_DA1 65 GPIO HD2 pin 4
EIM_DA2 66 GPIO HD2 pin 6
EIM_DA3 67 GPIO HD2 pin 8
EIM_DA4 68 GPIO HD2 pin 7
EIM_DA5 69 GPIO HD2 pin 9
EIM_DA6 70 GPIO HD2 pin 13
EIM_DA7 71 GPIO HD2 pin 15
EIM_DA8 72 GPIO HD2 pin 16
EIM_DA9 73 GPIO HD2 pin 17
EIM_DA10 74 GPIO HD2 pin 14
EIM_DA11 75 GPIO HD2 pin 24
EIM_DA12 76 GPIO HD2 pin 21
EIM_DA13 77 GPIO HD2 pin 19
EIM_DA14 78 GPIO HD2 pin 20
EIM_DA15 79 GPIO HD2 pin 18
TTYMXC2_RXD [3] 224 ttymxc2 rxd HD1 pin 10
TTYMXC4_RXD 225 ttymxc4 rxd P1-B pin 16
TTYMXC2_RTS 226 NC NC
TTYMXC3_RXD 227 ttymxc3 rxd COM Header pin 2
TTYMXC1_CTS 228 ttymxc1 cts Onboard (Bluetooth RTS)
TTYMXC2_CTS 229 NC NC
MB_TXD 230 ttyMAX1 txd Modbus RJ45 Data pins 4/5 +/-
MB_TX_EN_485 231 ttyMAX1 txen Onboard
  1. The pad name does not often correspond with the functionality of the IO we use, but can be used to reference the pad in the CPU manual.
  2. This does not contain all of the functions possible for a pin, but the common functions as they are used on our off the shelf basebords. Consult the i.MX6 CPU Reference manual for a complete list.
  3. This pin is routed through the FPGA Crossbar