TS-8160-4200

TS-8160-4200

Released Mar. 2011
Product Page
Documentation
Schematic
Mechanical Drawing

Overview

The TS-8160 is a TS-SOCKET baseboard that provides an upgrade path for Technologic Systems TS-7260 and TS-7800 products. This board accepts any TS-4xxx macrocontroller. It interfaces to the macrocontroller via two TS-SOCKET standard 100-pin connectors and brings out the various ports to industry standard connectors. The TS-8160 is compatible with the TS-ENC720 enclosure.

TS-4200

See the TS-4200 page for functionality regarding the CPU, FPGA, and OS.

TS-4200 Atmel AT91SAM9G20 400MHz ARM9

Getting Started

Before attempting to apply power to the baseboard, perform the following steps while taking proper static discharge precautions

• Place the TS-8160 base board on a firm non-conductive surface.
• Place the COM1 "Console Enable" jumper in the console position so the debug port is brought out to the DB9 and COM1 headers.
• Carefully, insert the macrocontroller daughterboard by aligning and pressing evenly and firmly onto the pair of mating connectors
• Connect the console serial terminal cable
• Connect the Ethernet cable is applicable.
• Apply power
• Monitor the TS-SOCKET SBC using a terminal emulator connected to the serial console port to verify that the board is operating properly

See the TS-4200 page for more details on dealing with the functionality of the macrocontroller.

Features

USB Host

The USB is available on two ports as a USB 2.0 host.

Header PIN TS-Socket Location Name 1 N/A USB_5V 2 CN2 29 HOSTA_USB_M 3 CN2 31 HOSTA_USB_P 4 N/A GND

Note:

USB_5V can be toggled using DIO PA9/MCDA1.

DIO header

The DIO is manipulated through tsctl, or through manipulation of the registers directly.

Using tsctl will be the easiest way to communicate with the IO. This example will show the simplest way to toggle the IO, but see the tsctl page for more advanced usage.

# Start tsctl server if it is not already running.
# This only needs to be done once
tsctl --server &

# Lookup the logical DIO mapping of the dio header pin 1
eval `tsctl 127.0.0.1 System MapLookup DIO_1`
# If you run this outside of the eval it will return:
# DIO_1=130 

# Toggle the DIO high and low:
tsctl 127.0.0.1 DIO Set $DIO_1 high
tsctl 127.0.0.1 DIO Set $DIO_1 low

Pinout

Header

Pin Name Notes 1 DIO_1 Pulled high by R124 2 Ground 3 DIO_3 Pulled high by R123 4 I2C_CLK See TS-4200#I2C for more details. 5 DIO_5 Pulled high by R122 6 SPI_CS# See TS-4200#SPI for more details. 7 DIO_7 pulled high by R121 8 I2C_DAT See TS-4200#I2C for more details. 9 DIO_9 Pulled high by R120 10 SPI_MISO See TS-4200#SPI for more details. 11 DIO_11 Pulled high by R119 12 SPI_MOSI See TS-4200#SPI for more details. 13 DIO_13 Pulled high by R118 14 SPI_CLK See TS-4200#SPI for more details. 15 DIO_15 Pulled high by R117 16 CPU_3.3V Do not draw more than 12mA

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

WARNING:

DIO are not 5V tolerant. Only SPI_MOSI on this header is 5V tolerant.

LCD Header

The LCD header is designed around compatibility with our low cost LCD-LED: Alphanumeric 2x24 LCD. These IO are manipulated through tsctl, or through manipulation of the registers directly. Connector CN8 is a 14 pin (2x7) 0.1" spacing header.

Pinout	Header
Pin Name Notes 1 LCD_5V Provides up to 1400mA 2 Ground 3 LCD_RS 4 LCD_BIAS 5 LCD_EN 6 LCD_WR# 7 LCD_D1 8 LCD_D0 9 LCD_D3 10 LCD_D2 11 LCD_D5 12 LCD_D4 13 LCD_D7 14 LCD_D6	14 13 12 11 10 9 8 7 6 5 4 3 2 1

WARNING:

LCD_D0 thru LCD_D7 are 5V tolerant. LCD_WR#, LCD_RS, and LCD_EN are not.

Power to the LCD header can be toggled by manipulating LCD Enable in the #Register Map. The LCD_5V pin can provide up to 1400mA, but this is a shared 5V rail and will depend on your power supply and what other devices are using that rail.

ADC Header

The Analog to Digital Converter consists of a 4-channel 16 bit sigma-delta converter and two, 2-channel analog switches. These are configured to allow input and conversion on two differential channels and 4 single ended channels. The 6-channel Analog to Digital signals are contained on connector HD5 which is a 16 pin (2x8) 0.1" spacing header. The connector layout and the signals carried by each pin are defined below. The input range for the differential input channels is 0- 2 VDC, and the input range on the single-ended channel is nominally 0-10 VDC.

This can be accessed on the TS-4200 by using the TS-4200#ADC Core.

Pinout	Header
Pin Type Signal 1 Single ended Channel 6 2 N/A GND 3 Single ended Channel 5 4 N/A GND 5 Single ended Channel 4 6 N/A GND 7 Single ended Channel 3 8 N/A GND 9 N/A Not connected 10 N/A GND 11 Differential Channel 2- 12 Differential Channel 2+ 13 N/A GND 14 Differential Channel 1- 15 Differential Channel 1+ 16 N/A GND	16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

Sleep mode

The TS-8160 features a AVR that has the ability to cut power to the macrocontroller for a specified amount of time. You can also use the jumper labelled 'WAKE', or the press the button on SW1 to restore power to the macrocontroller.

The ts8160ctl is available here.

Sleeping the board is essentially a shutdown. It is recommended that you have all of your filesystems in a read only state before running this command to avoid disk corruption. This example will simply shut down the macrocontroller for 20 seconds.

ts8160ctl --sleep 20

Power consumption during sleep mode is approximately 100uA.

Note:

Sleep times will be rounded up to the granularity of sleep, which is 8 seconds for sleeps under ~3 days and 2048 seconds for longer sleeps. Actual sleep time will be +/- 10% the requested time due to low-power oscillator variation.

COM ports

Port	Type	RX (or 485 +)	TX (or 485 -)	Notes
ttyS0	RS232	DB9 pin 2, COM1 header pin 2	DB9 pin 3, COM1 header pin 3	Only with console enable jumper on
ttyS1	RS485	DB9 pin 1, COM1 header pin 1	DB9 pin 6, COM1 header pin 6
ttyS2	RS232	DB9 pin 2, COM1 header pin 2	DB9 pin 3, COM1 header pin 3	Only with console enable jumper off
ttyS3	RS232	DB9 pin 8, COM1 header pin 8	DB9 pin 7, COM1 header pin 7
ttyS4	RS232	COM2 header pin 2	COM2 header pin 3
ttyS5	RS485	COM2 header pin 1	COM2 header pin 6
ttyS6	RS232	COM3 header pin 2	COM3 header pin 3	CTS available on pin 8

PC104 Header

The PC-104 connector consists of two rows of pins labeled A and B, the numbering of of which is shown below. The signals for the PC-104 are generated by the MAX240 PLD located on the baseboard. It converts the MUXBUS signals from the dual 100-pin Macrocontroller interface bus. Pin A1 is nearest to the macrocontroller mounting hole.

See the TS-4200#PC104 section for more details on working with the PC104 bus.

Any of the IO on this board labelled DIO_ can be controlled through tsctl as PC104_A/B<pin>, or through manipulation of the registers directly.

# Start tsctl server if it is not already running.
# This only needs to be done once
tsctl --server &

# Lookup the logical DIO mapping of the PC104 header pin A16
eval `tsctl 127.0.0.1 System MapLookup PC104_A16`
# If you run this outside of the eval it will return:
# PC104_A16=138

# Toggle the DIO high and low:
tsctl 127.0.0.1 DIO Set $PC104_A16 high
tsctl 127.0.0.1 DIO Set $PC104_A16 low

You can also drive these DIO to manually manipulate the PC104 address to make peripherals usable that require a higher range of address than provided by the default address space of the MUXBUS.

Pin	Name	Pin	Name
A1	BUS_BHE#	B1	Ground
A2	AD_07	B2	ISA_RESET
A3	AD_06	B3	5V
A4	AD_05	B4	AD_08
A5	AD_04	B5	CPU_3.3V
A6	AD_03	B6	Not connected
A7	AD_02	B7	Not connected
A8	AD_01	B8	Not connected
A9	AD_D0	B9	VIN
A10	ISA_WAIT#	B10	Ground
A11	Ground	B11	DIO_B11
A12	Not connected	B12	DIO_B12
A13	Not connected	B13	ISA_LOW#
A14	Not connected	B14	ISA_IOR#
A15	Not connected	B15	Not connected
A16	DIO_A16	B16	Not connected
A17	DIO_A17	B17	AD_09
A18	DIO_A18	B18	AD_10
A19	DIO_A19	B19	Not connected
A20	DIO_A20	B20	AD_12
A21	DIO_A21	B21	ISA_IRQ7
A22	ISA_ADD9	B22	ISA_IRQ6
A23	ISA_ADD8	B23	ISA_IRQ5
A24	ISA_ADD7	B24	Ground
A25	ISA_ADD6	B25	AD_11
A26	ISA_ADD5	B26	AD_13
A27	ISA_ADD4	B27	AD_14
A28	ISA_ADD3	B28	AD_15
A29	ISA_ADD2	B29	5V
A30	ISA_ADD1	B30	ISA 14.3 MHZ
A31	ISA_ADD0	B31	Ground
A32	Ground	B32	Ground

WARNING:

Most of the pins on the PC104 bus are only 3.3V tolerant. Refer to the schematic for more details.

Register Map

All of these registers are intended for 16 bit access. You can find this range at 0x30000400. You must first set the MUXBUS configuration register before accessing this range. For example, to read the board ID:

peekpoke 16 0x30000020 0x181 # Set MUXBUS configuration
peekpoke 16 0x30000400 # Read Board ID register (0x0)

Offset	Bits	Name	Access	Description
0x0	15:0	Board ID	Read Only	Returns '0x8100'
0x2	3:0	PLD revision	Read Only
	7:4	LCD Contrast	Read/Write
	8	USB Reset	Read/Write	Allows you to reset the USB hub
	9	ISA Reset	Read/Write
	10	Enable Oscillator	Read/Write
	11	Enable RS-232	Read/Write
	12	Enable LCD Power	Read/Write
	13	CAN1 Standby	Read/Write
	14	CAN2 Standby	Read/Write
	15	LCD Contrast Enable	Read/Write
0x4	7:0	Odd numbered pins 15:1	Read/Write	Output data on the DIO header
	13:8	PC104 pins A21:A16	Read/Write	Output data on PC104 header
	15:14	PC104 pins B12:B11	Read/Write	Output data on PC104 header
0x6	7:0	Pins 14-7 data	Read Only	LCD data lines output data
	8	LCD Write/Read (pin 6)	Read/Write	LCD Header pin 6 output data
	9	LCD Register Select (pin 3)	Read/Write	LCD Header pin 3 output data
	10	LCD Enable (pin 5)	Read/Write	LCD Header pin 5 output data
	11	AVR MOSI	Read/Write
	12	AVR SCLK	Read/Write
	13	AVR RESET	Read/Write
	14:15	Reserved	N/A
0x8	7:0	DIO data direction (odd pins 15:1)	Read/Write	DIO Header data direction
	13:8	PC104 pins A21:A16	Read/Write	PC104 GPIO data direction
	15:14	PC104 pins B12:B11	Read/Write	PC104 GPIO data direction
0xa	7:0	Pins 14-7 direction	Read Only	LCD GPIO data direction
	8	LCD Write/Read (pin 6)	Read/Write	LCD Header pin 6 data direction
	9	LCD Register Select (pin 3)	Read/Write	LCD Header pin 3 data direction
	10	LCD Enable (pin 5)	Read/Write	LCD Header pin 5 data direction
0xc	7:0	DIO Input Data (odd pins 15:1)	Read/Write	DIO Header input data
	13:8	PC104 pins A21:A16	Read/Write	PC104 GPIO input data
	15:14	PC104 pins B12:B11	Read/Write	PC104 GPIO input data
0xe	7:0	Pins 14-7 data	Read Only	LCD Header input data
	8	LCD Write/Read (pin 6)	Read/Write	For selecting between reads/writes
	9	LCD Register Select (pin 3)	Read/Write	Select between data and instruction registers
	10	LCD Enable (pin 5)	Read/Write	Toggles the LCD functionality
	11	AVR MISO	Read/Write
	15:12	Reserved	N/A

Errata

TS-8160 AVR will not wake from sleep with button

Synopsis	Rev 2 of the AVR software does not correctly use the WAKE button/pins
Severity	Minor
Class	Software bug
Affected	TS-8160 AVR Rev 2
Status	Workarounds available, fixed in Rev 3, shipping on June 12th 2012

Description:

Revision 2 of the AVR software did not correctly enable the interrupt for the IO port that the WAKE button/pins are on. Because of this sleep could not be interrupted without cutting power to the TS-8160. The only way to fix this is by updating to Rev 3. There are two ways to do this, see below for more information.

Workaround: The TS-8160 AVR software revision can be checked with:

ts8160ctl --info

If the Revision field shows "2" then this device cannot wake up from a sleep. The fix is as follows:

1) The System-on-Module (SoM) NEEDS to be a TS-4200. Currently none of our other SoMs can reprogram the AVR. If this is the case, an RMA can be submitted and we will reflash the AVR here. Submit an RMA request here.

2) Download this tarball, unzip it in the fastboot shell on the TS-4200 while booted with the TS-8160. Follow the instructions contained in the README file. Once this is completed, reboot, and the new AVR software will be running.

Due to space limitations, it is best to download and unpack in the /tmp folder of the fastboot shell

Product Notes

FCC Advisory

This equipment generates, uses, and can radiate radio frequency energy and if not installed and used properly (that is, in strict accordance with the manufacturer's instructions), may cause interference to radio and television reception. It has been type tested and found to comply with the limits for a Class A digital device in accordance with the specifications in Part 15 of FCC Rules, which are designed to provide reasonable protection against such interference when operated in a commercial environment. Operation of this equipment in a residential area is likely to cause interference, in which case the owner will be required to correct the interference at his own expense.

If this equipment does cause interference, which can be determined by turning the unit on and off, the user is encouraged to try the following measures to correct the interference:

Reorient the receiving antenna. Relocate the unit with respect to the receiver. Plug the unit into a different outlet so that the unit and receiver are on different branch circuits. Ensure that mounting screws and connector attachment screws are tightly secured. Ensure that good quality, shielded, and grounded cables are used for all data communications. If necessary, the user should consult the dealer or an experienced radio/television technician for additional suggestions. The following booklets prepared by the Federal Communications Commission (FCC) may also prove helpful:

How to Identify and Resolve Radio-TV Interference Problems (Stock No. 004-000-000345-4) Interface Handbook (Stock No. 004-000-004505-7) These booklets may be purchased from the Superintendent of Documents, U.S. Government Printing Office, Washington, DC 20402.

Limited Warranty

See our Terms and Conditions for more details.